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Searched refs:DEEP_SLEEP_CLK_SEL (Results 1 - 8 of 8) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/radeon/
cikd.h	`294 # define DEEP_SLEEP_CLK_SEL(x) ((x) << 0)`
sid.h	`174 # define DEEP_SLEEP_CLK_SEL(x) ((x) << 0)`
radeon_si.c	`7442 data \|= DEEP_SLEEP_CLK_SEL(1) \| ZCLK_SEL(1);`
radeon_cik.c	`9855 data \|= DEEP_SLEEP_CLK_SEL(1) \| ZCLK_SEL(1);`
radeon_si_dpm.c	`3679 WREG32_P(MISC_CLK_CNTL, DEEP_SLEEP_CLK_SEL(tmp), ~DEEP_SLEEP_CLK_SEL_MASK);`
/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
sid.h	`176 # define DEEP_SLEEP_CLK_SEL(x) ((x) << 0)`
amdgpu_si.c	`2028 data \|= DEEP_SLEEP_CLK_SEL(1) \| ZCLK_SEL(1);`
amdgpu_si_dpm.c	`4139 /* DEEP_SLEEP_CLK_SEL field should be 0x10 on tahiti A0 */ 4146 WREG32_P(MISC_CLK_CNTL, DEEP_SLEEP_CLK_SEL(tmp), ~DEEP_SLEEP_CLK_SEL_MASK);`

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