Searched refs:DISP_CC_MDSS_PCLK0_CLK_SRC (Results 1 - 25 of 31) sorted by relevance

12

/src/sys/external/gpl2/dts/dist/include/dt-bindings/clock/
H A Dqcom,sm6115-dispcc.h27 #define DISP_CC_MDSS_PCLK0_CLK_SRC 15 macro
H A Dqcom,sm6375-dispcc.h27 #define DISP_CC_MDSS_PCLK0_CLK_SRC 14 macro
H A Dqcom,dispcc-qcm2290.h26 #define DISP_CC_MDSS_PCLK0_CLK_SRC 14 macro
H A Dqcom,dispcc-sm6125.h33 #define DISP_CC_MDSS_PCLK0_CLK_SRC 22 macro
H A Dqcom,dispcc-sc7180.h36 #define DISP_CC_MDSS_PCLK0_CLK_SRC 25 macro
H A Dqcom,sm4450-dispcc.h28 #define DISP_CC_MDSS_PCLK0_CLK_SRC 16 macro
H A Dqcom,dispcc-sm6350.h37 #define DISP_CC_MDSS_PCLK0_CLK_SRC 24 macro
H A Dqcom,dispcc-sc7280.h44 #define DISP_CC_MDSS_PCLK0_CLK_SRC 32 macro
H A Dqcom,dispcc-sdm845.h28 #define DISP_CC_MDSS_PCLK0_CLK_SRC 16 macro
H A Dqcom,dispcc-sm8250.h49 #define DISP_CC_MDSS_PCLK0_CLK_SRC 37 macro
H A Dqcom,dispcc-sm8350.h49 #define DISP_CC_MDSS_PCLK0_CLK_SRC 37 macro
H A Dqcom,dispcc-sm8150.h49 #define DISP_CC_MDSS_PCLK0_CLK_SRC 37 macro
H A Dqcom,sm8450-dispcc.h78 #define DISP_CC_MDSS_PCLK0_CLK_SRC 66 macro
H A Dqcom,sm8550-dispcc.h79 #define DISP_CC_MDSS_PCLK0_CLK_SRC 67 macro
H A Dqcom,sm8650-dispcc.h79 #define DISP_CC_MDSS_PCLK0_CLK_SRC 67 macro
H A Dqcom,x1e80100-dispcc.h76 #define DISP_CC_MDSS_PCLK0_CLK_SRC 64 macro
H A Dqcom,dispcc-sc8280xp.h78 #define DISP_CC_MDSS_PCLK0_CLK_SRC 66 macro
/src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/qcom/
H A Dsm6125.dtsi1340 <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>;
H A Dsdm670.dtsi1518 <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>;
H A Dqcm2290.dtsi1705 <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>;
H A Dsm6350.dtsi2269 <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>;
H A Dsm6115.dtsi1945 <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>;
H A Dsc7180.dtsi3288 assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>;
H A Dsm8150.dtsi3979 <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>;
H A Dsm8350.dtsi2956 <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>;

Completed in 30 milliseconds

12