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    Searched refs:FMT_TRUNCATE_DEPTH (Results 1 - 13 of 13) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/
amdgpu_dce_opp.c 118 FMT_TRUNCATE_DEPTH, 0,
127 FMT_TRUNCATE_DEPTH, 1,
133 FMT_TRUNCATE_DEPTH, 2,
143 FMT_TRUNCATE_DEPTH,
dce_opp.h 93 OPP_SF(FMT_BIT_DEPTH_CONTROL, FMT_TRUNCATE_DEPTH, mask_sh),\
156 OPP_SF(FMT0_FMT_BIT_DEPTH_CONTROL, FMT_TRUNCATE_DEPTH, mask_sh),\
201 type FMT_TRUNCATE_DEPTH; \
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/
dcn10_opp.h 72 OPP_SF(FMT0_FMT_BIT_DEPTH_CONTROL, FMT_TRUNCATE_DEPTH, mask_sh), \
106 type FMT_TRUNCATE_DEPTH; \
amdgpu_dcn10_opp.c 62 FMT_TRUNCATE_DEPTH, params->flags.TRUNCATE_DEPTH,
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_dce_v10_0.c 548 tmp = REG_SET_FIELD(tmp, FMT_BIT_DEPTH_CONTROL, FMT_TRUNCATE_DEPTH, 0);
561 tmp = REG_SET_FIELD(tmp, FMT_BIT_DEPTH_CONTROL, FMT_TRUNCATE_DEPTH, 1);
574 tmp = REG_SET_FIELD(tmp, FMT_BIT_DEPTH_CONTROL, FMT_TRUNCATE_DEPTH, 2);
amdgpu_dce_v11_0.c 574 tmp = REG_SET_FIELD(tmp, FMT_BIT_DEPTH_CONTROL, FMT_TRUNCATE_DEPTH, 0);
587 tmp = REG_SET_FIELD(tmp, FMT_BIT_DEPTH_CONTROL, FMT_TRUNCATE_DEPTH, 1);
600 tmp = REG_SET_FIELD(tmp, FMT_BIT_DEPTH_CONTROL, FMT_TRUNCATE_DEPTH, 2);
sid.h 2108 #define FMT_TRUNCATE_DEPTH (1 << 4)
  /src/sys/external/bsd/drm2/dist/drm/radeon/
cikd.h 992 # define FMT_TRUNCATE_DEPTH(x) ((x) << 4) /* 0 - 18bpp, 1 - 24bpp, 2 - 30bpp */
evergreend.h 1380 # define FMT_TRUNCATE_DEPTH (1 << 4)
r600d.h 1249 # define FMT_TRUNCATE_DEPTH (1 << 4)
radeon_cik.c 8842 tmp |= (FMT_TRUNCATE_EN | FMT_TRUNCATE_DEPTH(0));
8851 tmp |= (FMT_TRUNCATE_EN | FMT_TRUNCATE_DEPTH(1));
8860 tmp |= (FMT_TRUNCATE_EN | FMT_TRUNCATE_DEPTH(2));
radeon_r600.c 345 tmp |= (FMT_TRUNCATE_EN | FMT_TRUNCATE_DEPTH);
radeon_evergreen.c 1345 tmp |= (FMT_TRUNCATE_EN | FMT_TRUNCATE_DEPTH);

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