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    Searched refs:FMT_TRUNCATE_EN (Results 1 - 13 of 13) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/
amdgpu_dce_opp.c 117 FMT_TRUNCATE_EN, 0,
126 FMT_TRUNCATE_EN, 1,
132 FMT_TRUNCATE_EN, 1,
142 FMT_TRUNCATE_EN, 1,
dce_opp.h 92 OPP_SF(FMT_BIT_DEPTH_CONTROL, FMT_TRUNCATE_EN, mask_sh),\
155 OPP_SF(FMT0_FMT_BIT_DEPTH_CONTROL, FMT_TRUNCATE_EN, mask_sh),\
200 type FMT_TRUNCATE_EN; \
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/
dcn10_opp.h 71 OPP_SF(FMT0_FMT_BIT_DEPTH_CONTROL, FMT_TRUNCATE_EN, mask_sh), \
105 type FMT_TRUNCATE_EN; \
amdgpu_dcn10_opp.c 61 FMT_TRUNCATE_EN, params->flags.TRUNCATE_ENABLED,
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_dce_v10_0.c 547 tmp = REG_SET_FIELD(tmp, FMT_BIT_DEPTH_CONTROL, FMT_TRUNCATE_EN, 1);
560 tmp = REG_SET_FIELD(tmp, FMT_BIT_DEPTH_CONTROL, FMT_TRUNCATE_EN, 1);
573 tmp = REG_SET_FIELD(tmp, FMT_BIT_DEPTH_CONTROL, FMT_TRUNCATE_EN, 1);
amdgpu_dce_v11_0.c 573 tmp = REG_SET_FIELD(tmp, FMT_BIT_DEPTH_CONTROL, FMT_TRUNCATE_EN, 1);
586 tmp = REG_SET_FIELD(tmp, FMT_BIT_DEPTH_CONTROL, FMT_TRUNCATE_EN, 1);
599 tmp = REG_SET_FIELD(tmp, FMT_BIT_DEPTH_CONTROL, FMT_TRUNCATE_EN, 1);
sid.h 2107 #define FMT_TRUNCATE_EN (1 << 0)
  /src/sys/external/bsd/drm2/dist/drm/radeon/
cikd.h 990 # define FMT_TRUNCATE_EN (1 << 0)
evergreend.h 1379 # define FMT_TRUNCATE_EN (1 << 0)
r600d.h 1248 # define FMT_TRUNCATE_EN (1 << 0)
radeon_r600.c 338 tmp |= FMT_TRUNCATE_EN;
345 tmp |= (FMT_TRUNCATE_EN | FMT_TRUNCATE_DEPTH);
radeon_cik.c 8842 tmp |= (FMT_TRUNCATE_EN | FMT_TRUNCATE_DEPTH(0));
8851 tmp |= (FMT_TRUNCATE_EN | FMT_TRUNCATE_DEPTH(1));
8860 tmp |= (FMT_TRUNCATE_EN | FMT_TRUNCATE_DEPTH(2));
radeon_evergreen.c 1336 tmp |= FMT_TRUNCATE_EN;
1345 tmp |= (FMT_TRUNCATE_EN | FMT_TRUNCATE_DEPTH);

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