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    Searched refs:HDMI_ACR_CTS_44 (Results 1 - 10 of 10) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/
dce_stream_encoder.h 185 SE_SF(HDMI_ACR_44_0, HDMI_ACR_CTS_44, mask_sh),\
265 SE_SF(DIG0_HDMI_ACR_44_0, HDMI_ACR_CTS_44, mask_sh),\
461 uint8_t HDMI_ACR_CTS_44;
592 uint32_t HDMI_ACR_CTS_44;
amdgpu_dce_stream_encoder.c 1412 REG_UPDATE(HDMI_ACR_44_0, HDMI_ACR_CTS_44, audio_clock_info.cts_44khz);
  /src/sys/external/bsd/drm2/dist/drm/radeon/
radeon_evergreen_hdmi.c 95 WREG32(HDMI_ACR_44_0 + offset, HDMI_ACR_CTS_44(acr->cts_44_1khz));
rv770d.h 794 # define HDMI_ACR_CTS_44(x) (((x) & 0xfffff) << 12)
evergreend.h 648 # define HDMI_ACR_CTS_44(x) (((x) & 0xfffff) << 12)
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/
dcn10_stream_encoder.h 235 SE_SF(DIG0_HDMI_ACR_44_0, HDMI_ACR_CTS_44, mask_sh),\
425 type HDMI_ACR_CTS_44;\
amdgpu_dcn10_stream_encoder.c 1344 REG_UPDATE(HDMI_ACR_44_0, HDMI_ACR_CTS_44, audio_clock_info.cts_44khz);
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_dce_v10_0.c 1505 tmp = REG_SET_FIELD(tmp, HDMI_ACR_44_0, HDMI_ACR_CTS_44, acr.cts_44_1khz);
amdgpu_dce_v11_0.c 1547 tmp = REG_SET_FIELD(tmp, HDMI_ACR_44_0, HDMI_ACR_CTS_44, acr.cts_44_1khz);
amdgpu_dce_v6_0.c 1436 tmp = REG_SET_FIELD(tmp, HDMI_ACR_44_0, HDMI_ACR_CTS_44, acr.cts_44_1khz);

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