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    Searched refs:HDMI_ACR_N_32 (Results 1 - 9 of 9) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/
dce_stream_encoder.h 184 SE_SF(HDMI_ACR_32_1, HDMI_ACR_N_32, mask_sh),\
264 SE_SF(DIG0_HDMI_ACR_32_1, HDMI_ACR_N_32, mask_sh),\
460 uint8_t HDMI_ACR_N_32;
591 uint32_t HDMI_ACR_N_32;
amdgpu_dce_stream_encoder.c 1409 REG_UPDATE(HDMI_ACR_32_1, HDMI_ACR_N_32, audio_clock_info.n_32khz);
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/
dcn10_stream_encoder.h 234 SE_SF(DIG0_HDMI_ACR_32_1, HDMI_ACR_N_32, mask_sh),\
424 type HDMI_ACR_N_32;\
amdgpu_dcn10_stream_encoder.c 1341 REG_UPDATE(HDMI_ACR_32_1, HDMI_ACR_N_32, audio_clock_info.n_32khz);
  /src/sys/external/bsd/drm2/dist/drm/radeon/
rv770d.h 792 # define HDMI_ACR_N_32(x) (((x) & 0xfffff) << 0)
evergreend.h 646 # define HDMI_ACR_N_32(x) (((x) & 0xfffff) << 0)
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_dce_v10_0.c 1501 tmp = REG_SET_FIELD(tmp, HDMI_ACR_32_1, HDMI_ACR_N_32, acr.n_32khz);
amdgpu_dce_v11_0.c 1543 tmp = REG_SET_FIELD(tmp, HDMI_ACR_32_1, HDMI_ACR_N_32, acr.n_32khz);
amdgpu_dce_v6_0.c 1432 tmp = REG_SET_FIELD(tmp, HDMI_ACR_32_1, HDMI_ACR_N_32, acr.n_32khz);

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