HomeSort by: relevance | last modified time | path
    Searched refs:HDMI_ACR_N_44 (Results 1 - 9 of 9) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/
dce_stream_encoder.h 186 SE_SF(HDMI_ACR_44_1, HDMI_ACR_N_44, mask_sh),\
266 SE_SF(DIG0_HDMI_ACR_44_1, HDMI_ACR_N_44, mask_sh),\
462 uint8_t HDMI_ACR_N_44;
593 uint32_t HDMI_ACR_N_44;
amdgpu_dce_stream_encoder.c 1415 REG_UPDATE(HDMI_ACR_44_1, HDMI_ACR_N_44, audio_clock_info.n_44khz);
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/
dcn10_stream_encoder.h 236 SE_SF(DIG0_HDMI_ACR_44_1, HDMI_ACR_N_44, mask_sh),\
426 type HDMI_ACR_N_44;\
amdgpu_dcn10_stream_encoder.c 1347 REG_UPDATE(HDMI_ACR_44_1, HDMI_ACR_N_44, audio_clock_info.n_44khz);
  /src/sys/external/bsd/drm2/dist/drm/radeon/
rv770d.h 796 # define HDMI_ACR_N_44(x) (((x) & 0xfffff) << 0)
evergreend.h 650 # define HDMI_ACR_N_44(x) (((x) & 0xfffff) << 0)
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_dce_v10_0.c 1508 tmp = REG_SET_FIELD(tmp, HDMI_ACR_44_1, HDMI_ACR_N_44, acr.n_44_1khz);
amdgpu_dce_v11_0.c 1550 tmp = REG_SET_FIELD(tmp, HDMI_ACR_44_1, HDMI_ACR_N_44, acr.n_44_1khz);
amdgpu_dce_v6_0.c 1439 tmp = REG_SET_FIELD(tmp, HDMI_ACR_44_1, HDMI_ACR_N_44, acr.n_44_1khz);

Completed in 30 milliseconds