HomeSort by: relevance | last modified time | path
    Searched refs:HDMI_ACR_N_48 (Results 1 - 9 of 9) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/
dce_stream_encoder.h 188 SE_SF(HDMI_ACR_48_1, HDMI_ACR_N_48, mask_sh),\
268 SE_SF(DIG0_HDMI_ACR_48_1, HDMI_ACR_N_48, mask_sh),\
464 uint8_t HDMI_ACR_N_48;
595 uint32_t HDMI_ACR_N_48;
amdgpu_dce_stream_encoder.c 1421 REG_UPDATE(HDMI_ACR_48_1, HDMI_ACR_N_48, audio_clock_info.n_48khz);
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/
dcn10_stream_encoder.h 238 SE_SF(DIG0_HDMI_ACR_48_1, HDMI_ACR_N_48, mask_sh),\
428 type HDMI_ACR_N_48;\
amdgpu_dcn10_stream_encoder.c 1353 REG_UPDATE(HDMI_ACR_48_1, HDMI_ACR_N_48, audio_clock_info.n_48khz);
  /src/sys/external/bsd/drm2/dist/drm/radeon/
rv770d.h 800 # define HDMI_ACR_N_48(x) (((x) & 0xfffff) << 0)
evergreend.h 654 # define HDMI_ACR_N_48(x) (((x) & 0xfffff) << 0)
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_dce_v10_0.c 1515 tmp = REG_SET_FIELD(tmp, HDMI_ACR_48_1, HDMI_ACR_N_48, acr.n_48khz);
amdgpu_dce_v11_0.c 1557 tmp = REG_SET_FIELD(tmp, HDMI_ACR_48_1, HDMI_ACR_N_48, acr.n_48khz);
amdgpu_dce_v6_0.c 1446 tmp = REG_SET_FIELD(tmp, HDMI_ACR_48_1, HDMI_ACR_N_48, acr.n_48khz);

Completed in 67 milliseconds