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Searched refs:ICU_INT_HWMASK (Results 1 - 8 of 8) sorted by relevancy

/src/sys/arch/arm/xscale/
i80321_intr.h	`59 : "r" (intr_enabled & ICU_INT_HWMASK)); 77 hwpend = (i80321_ipending & ICU_INT_HWMASK) & ~i80321_imask[new];`
i80321_icu.c	`140 : "r" (intr_steer & ICU_INT_HWMASK)); 451 hwpend \|= ((i80321_ipending & ICU_INT_HWMASK) & ~imask);`
i80321reg.h	`363 #define ICU_INT_HWMASK (0xffffffff & \`
pxa2x0reg.h	`143 #define ICU_INT_HWMASK 0xffffff00`
/src/sys/arch/arm/footbridge/
footbridge_intr.h	`80 #define ICU_INT_HWMASK (0xffffffff & ~(INT_SWMASK \| (1U << IRQ_RESERVED3))) 91 uint32_t tmp = intr_enabled & ICU_INT_HWMASK; 110 hwpend = footbridge_ipending & ICU_INT_HWMASK & ~footbridge_imask[ipl];`
footbridge_irqhandler.c	`336 hwpend \|= (footbridge_ipending & ICU_INT_HWMASK) & ~imask;`
/src/sys/arch/arm/s3c2xx0/
s3c2800_intr.c	`92 while ((irqbits = icreg(INTCTL_IRQPND) & ICU_INT_HWMASK) != 0) {`
s3c2800reg.h	`100 #define ICU_INT_HWMASK 0x1fffffff`

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