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    Searched refs:IST_LEVEL (Results 1 - 25 of 225) sorted by relevancy

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  /src/sys/arch/shark/include/
intr.h 54 #define IST_LEVEL 3 /* level-triggered */
  /src/sys/arch/alpha/pci/
pci_2100_a500.c 115 IST_LEVEL, /* PCI slot 0 A */
116 IST_LEVEL, /* on-board SCSI */
117 IST_LEVEL, /* on-board Ethernet */
119 IST_LEVEL, /* PCI slot 1 A */
120 IST_LEVEL, /* PCI slot 2 A */
135 IST_LEVEL, /* PCI slot 2 B (EISA IRQ 13 n/c) */
138 IST_LEVEL, /* I2C (XXX double-check this) */
139 IST_LEVEL, /* PCI slot 0 B */
140 IST_LEVEL, /* PCI slot 1 B */
141 IST_LEVEL, /* PCI slot 0 C *
    [all...]
  /src/sys/arch/acorn32/include/
intr.h 57 #define IST_LEVEL 3 /* level-triggered */
  /src/sys/arch/hppa/include/
intrdefs.h 21 #define IST_LEVEL 3 /* level-triggered */
  /src/sys/arch/hpcarm/include/
intr.h 56 #define IST_LEVEL 3 /* level-triggered */
58 #define IST_LEVEL_LOW IST_LEVEL
  /src/sys/arch/iyonix/include/
intr.h 59 #define IST_LEVEL 3 /* level-triggered */
61 #define IST_LEVEL_LOW IST_LEVEL
  /src/sys/arch/zaurus/include/
intr.h 59 #define IST_LEVEL 3 /* level-triggered */
61 #define IST_LEVEL_LOW IST_LEVEL
  /src/sys/arch/evbarm/include/
intr.h 59 #define IST_LEVEL 3 /* level-triggered */
61 #define IST_LEVEL_LOW IST_LEVEL
  /src/sys/arch/sh3/include/
intr.h 38 #define IST_LEVEL 3 /* level-triggered */
  /src/sys/arch/ia64/include/
intrdefs.h 50 #define IST_LEVEL 3 /* level-triggered */
  /src/sys/arch/or1k/include/
intr.h 65 #define IST_LEVEL 3 /* level-triggered */
67 #define IST_LEVEL_LOW IST_LEVEL
  /src/sys/arch/powerpc/include/
intr.h 57 #define IST_LEVEL 3 /* low level triggered */
61 #define IST_LEVEL_LOW IST_LEVEL
  /src/sys/arch/epoc32/include/
intr.h 59 #define IST_LEVEL 3 /* level-triggered */
  /src/sys/arch/powerpc/powerpc/
openpic.c 19 if (type == IST_LEVEL)
  /src/sys/arch/sandpoint/pci/
pciide_machdep.c 70 cookie = isa_intr_establish_xname(NULL, irq, IST_LEVEL, IPL_BIO, func,
  /src/sys/arch/shark/ofw/
com_ofisa_machdep.c 82 descp[0].share = IST_LEVEL;
wdc_ofisa_machdep.c 81 descp[0].share = IST_LEVEL;
  /src/sys/arch/x86/include/
intrdefs.h 22 #define IST_LEVEL 3 /* level-triggered */
  /src/sys/arch/evbppc/ev64260/
gt_mainbus.c 206 intr_establish(IRQ_GPP7_0, IST_LEVEL, IPL_HIGH,
208 intr_establish(IRQ_GPP15_8, IST_LEVEL, IPL_HIGH,
210 intr_establish(IRQ_GPP23_16, IST_LEVEL, IPL_HIGH,
212 intr_establish(IRQ_GPP31_24, IST_LEVEL, IPL_HIGH,
253 return intr_establish(irq, IST_LEVEL, ipl, func, arg);
  /src/sys/arch/i386/pci/
opti82c700.c 259 *triggerp = val ? IST_LEVEL : IST_EDGE;
273 *triggerp = IST_LEVEL;
289 return ((trigger != IST_LEVEL) ? 0 : 1);
302 if (trigger == IST_LEVEL)
322 return (trigger == IST_LEVEL ? 0 : 1);
opti82c558.c 203 *triggerp = IST_LEVEL;
219 return ((trigger != IST_LEVEL) ? 0 : 1);
224 if (trigger == IST_LEVEL)
  /src/sys/arch/powerpc/ibm4xx/dev/
mal.c 96 intr_establish_xname(maltbl[i].intrs[0], IST_LEVEL, IPL_NET,
98 intr_establish_xname(maltbl[i].intrs[1], IST_LEVEL, IPL_NET,
100 intr_establish_xname(maltbl[i].intrs[2], IST_LEVEL, IPL_NET,
102 intr_establish_xname(maltbl[i].intrs[3], IST_LEVEL, IPL_NET,
104 intr_establish_xname(maltbl[i].intrs[4], IST_LEVEL, IPL_NET,
  /src/sys/arch/arm/s3c2xx0/
sscom_s3c2440.c 177 IPL_SERIAL, IST_LEVEL, sscomtxintr, sc);
179 IPL_SERIAL, IST_LEVEL, sscomrxintr, sc);
181 IPL_SERIAL, IST_LEVEL, sscomrxintr, sc);
sscom_s3c2410.c 156 IPL_SERIAL, IST_LEVEL, sscomtxintr, sc);
158 IPL_SERIAL, IST_LEVEL, sscomrxintr, sc);
160 IPL_SERIAL, IST_LEVEL, sscomrxintr, sc);
sscom_s3c2800.c 144 IPL_SERIAL, IST_LEVEL, sscomtxintr, sc);
146 IPL_SERIAL, IST_LEVEL, sscomrxintr, sc);
148 IPL_SERIAL, IST_LEVEL, sscomrxintr, sc);

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