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Searched refs:JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT (Results 1 - 7 of 7) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_jpeg_v2_0.c	`289 data \|= 1 << JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT; 291 data &= ~JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT; 312 data \|= 1 << JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT; 314 data \|= 0 << JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT;`
amdgpu_jpeg_v2_5.c	`264 data \|= 1 << JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT; 266 data &= ~JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT;`
amdgpu_vcn_v1_0.c	`452 data \|= 1 << JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT; 578 data \|= 1 << JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT; 580 data \|= 0 << JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT; 642 reg_data = 1 << JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT; 644 reg_data = 0 << JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT;`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/uvd/
uvd_7_0_sh_mask.h	`496 #define JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT 0x0`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/
vcn_1_0_sh_mask.h	`1018 #define JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT 0x0`
vcn_2_0_0_sh_mask.h	`1354 #define JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT 0x0`
vcn_2_5_sh_mask.h	`1357 #define JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT 0x0`

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