Searched refs:JZ4780_CLK_RTCLK (Results 1 - 3 of 3) sorted by relevance

/src/sys/external/gpl2/dts/dist/include/dt-bindings/clock/
H A Dingenic,jz4780-cgu.h18 #define JZ4780_CLK_RTCLK 1 macro
/src/sys/external/gpl2/dts/dist/arch/mips/boot/dts/ingenic/
H A Djz4780.dtsi105 clocks = <&cgu JZ4780_CLK_RTCLK>,
156 clocks = <&cgu JZ4780_CLK_RTCLK>;
H A Dci20.dts172 assigned-clock-parents = <0>, <&cgu JZ4780_CLK_RTCLK>,

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