| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/renesas/ |
| hihope-rzg2-ex-lvds.dtsi | 3 * Device Tree Source for the RZ/G2[MN] HiHope sub board LVDS common parts
20 * When GP1_20 is LOW LVDS0 is connected to the LVDS connector
23 lvds-connector-en-gpio {
27 line-name = "lvds-connector-en-gpio";
|
| r8a774c0-ek874-idk-2121wr.dts | 4 * connected to an Advantech IDK-2121WR 21.5" LVDS panel
23 panel-lvds {
24 compatible = "advantech,idk-2121wr", "panel-lvds";
49 dual-lvds-odd-pixels;
57 dual-lvds-even-pixels;
68 * When GP0_17 is low LVDS[01] are connected to the LVDS connector
69 * When GP0_17 is high LVDS[01] are connected to the LT8918L
71 lvds-connector-en-gpio{
75 line-name = "lvds-connector-en-gpio"
[all...] |
| rzg2-advantech-idk-1110wr-panel.dtsi | 3 * Device Tree Source for the Advantech idk-1110wr LVDS panel connected
10 panel-lvds {
11 compatible = "advantech,idk-1110wr", "panel-lvds";
|
| /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/inc/ |
| smu7.h | 182 LVDS,
|
| smu71.h | 474 LVDS,
|
| smu72.h | 554 LVDS,
|
| smu73.h | 545 LVDS,
|
| smu74.h | 608 LVDS,
|
| smu75.h | 502 LVDS,
|
| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/disp/ |
| nouveau_nvkm_engine_disp_sornv50.c | 80 case 0: state->proto = LVDS; state->link = 1; break;
|
| nouveau_nvkm_engine_disp_sorgv100.c | 71 case 0: state->proto = LVDS; state->link = 1; break;
|
| ior.h | 31 LVDS,
|
| nouveau_nvkm_engine_disp_sorgf119.c | 149 case 0: state->proto = LVDS; state->link = 1; break;
|
| nouveau_nvkm_engine_disp_outp.c | 72 case DCB_OUTPUT_LVDS : *type = SOR; return LVDS;
|
| nouveau_nvkm_engine_disp_sorg94.c | 250 case 0: state->proto = LVDS; state->link = 1; break;
|
| nouveau_nvkm_engine_disp_nv50.c | 225 if (ior->asy.proto == LVDS) {
450 * A) Give dual-link LVDS a separate EVO protocol, like for TMDS.
452 * B) Use SetControlOutputResource.PixelDepth on LVDS.
457 if (ior->type == SOR && ior->asy.proto == LVDS) {
|
| /src/sys/external/bsd/drm2/dist/drm/radeon/ |
| smu7.h | 163 LVDS,
|
| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/freescale/ |
| fsl-ls1028a-kontron-sl28.dts | 259 "eMMC reset", "LVDS bridge reset",
260 "LVDS bridge power-down",
|
| /src/sys/external/bsd/drm/dist/shared-core/ |
| i915_suspend.c | 314 /* LVDS state */
321 dev_priv->saveLVDS = I915_READ(LVDS);
473 /* LVDS state */
477 I915_WRITE(LVDS, dev_priv->saveLVDS);
|
| i915_reg.h | 377 #define LVDS 0x61180
409 * The i830 generation, in LVDS mode, defines P1 as the bit number set within
674 /* LVDS port control */
675 #define LVDS 0x61180
677 * Enables the LVDS port. This bit must be set before DPLLs are enabled, as
678 * the DPLL semantics change when the LVDS is assigned to that pipe.
681 /* Selects pipe B for LVDS data. Must be set on pre-965. */
722 * - LVDS/DVOB/DVOC on
|
| /src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/ |
| imx6qdl-udoo.dtsi | 42 * but with LVDS bridge chip attached,
267 panelchan: lvds-channel@0 {
|
| imx53-m53menlo.dts | 379 /* LVDS pins only have pin mux configuration */
443 lvds0: lvds-channel@0 {
|
| imx6ul-ccimx6ulsbcpro.dts | 138 lcd-supply = <&ldo4_ext>; /* BU90T82 LVDS bridge power */
|
| imx6qdl-emcon.dtsi | 64 lvds_backlight: lvds-backlight {
134 reg_lvds_disp: reg-lvds-display {
136 regulator-name = "LVDS-Supply";
|
| /src/sys/external/bsd/drm2/dist/drm/i915/display/ |
| intel_lvds.c | 55 /* Private structure for the integrated LVDS support */
200 DRM_DEBUG_DRIVER("LVDS PPS:t1+t2 %d t3 %d t4 %d t5 %d tx %d "
287 * Set the dithering flag on LVDS as needed, note that there is no
288 * special lvds dither control bit on pch-split platforms, dithering is
293 * Bspec wording suggests that LVDS port dithering only exists
406 DRM_ERROR("Can't support LVDS on pipe A\n");
416 DRM_DEBUG_KMS("forcing display bpp (was %d) to LVDS (%d)\n",
506 DRM_INFO("Skipping LVDS initialization for %s\n", id->ident);
510 /* These systems claim to have LVDS, but really don't */
725 DRM_INFO("Forcing lvds to dual link mode on %s\n", id->ident)
829 u32 lvds; local in function:intel_lvds_init
[all...] |
