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    Searched refs:M4U_LARB5_ID (Results 1 - 4 of 4) sorted by relevancy

  /src/sys/external/gpl2/dts/dist/include/dt-bindings/memory/
mt8183-larb-port.h 18 #define M4U_LARB5_ID 5
69 #define M4U_PORT_CAM_IMGI MTK_M4U_ID(M4U_LARB5_ID, 0)
70 #define M4U_PORT_CAM_IMG2O MTK_M4U_ID(M4U_LARB5_ID, 1)
71 #define M4U_PORT_CAM_IMG3O MTK_M4U_ID(M4U_LARB5_ID, 2)
72 #define M4U_PORT_CAM_VIPI MTK_M4U_ID(M4U_LARB5_ID, 3)
73 #define M4U_PORT_CAM_LCEI MTK_M4U_ID(M4U_LARB5_ID, 4)
74 #define M4U_PORT_CAM_SMXI MTK_M4U_ID(M4U_LARB5_ID, 5)
75 #define M4U_PORT_CAM_SMXO MTK_M4U_ID(M4U_LARB5_ID, 6)
76 #define M4U_PORT_CAM_WPE0_RDMA1 MTK_M4U_ID(M4U_LARB5_ID, 7)
77 #define M4U_PORT_CAM_WPE0_RDMA0 MTK_M4U_ID(M4U_LARB5_ID, 8
    [all...]
mt6779-larb-port.h 19 #define M4U_LARB5_ID 5
92 #define M4U_PORT_IMGI_D1 MTK_M4U_ID(M4U_LARB5_ID, 0)
93 #define M4U_PORT_IMGBI_D1 MTK_M4U_ID(M4U_LARB5_ID, 1)
94 #define M4U_PORT_DMGI_D1 MTK_M4U_ID(M4U_LARB5_ID, 2)
95 #define M4U_PORT_DEPI_D1 MTK_M4U_ID(M4U_LARB5_ID, 3)
96 #define M4U_PORT_LCEI_D1 MTK_M4U_ID(M4U_LARB5_ID, 4)
97 #define M4U_PORT_SMTI_D1 MTK_M4U_ID(M4U_LARB5_ID, 5)
98 #define M4U_PORT_SMTO_D2 MTK_M4U_ID(M4U_LARB5_ID, 6)
99 #define M4U_PORT_SMTO_D1 MTK_M4U_ID(M4U_LARB5_ID, 7)
100 #define M4U_PORT_CRZO_D1 MTK_M4U_ID(M4U_LARB5_ID, 8
    [all...]
mt8173-larb-port.h 18 #define M4U_LARB5_ID 5
91 #define M4U_PORT_VENC_RCPU_SET2 MTK_M4U_ID(M4U_LARB5_ID, 0)
92 #define M4U_PORT_VENC_REC_FRM_SET2 MTK_M4U_ID(M4U_LARB5_ID, 1)
93 #define M4U_PORT_VENC_REF_LUMA_SET2 MTK_M4U_ID(M4U_LARB5_ID, 2)
94 #define M4U_PORT_VENC_REC_CHROMA_SET2 MTK_M4U_ID(M4U_LARB5_ID, 3)
95 #define M4U_PORT_VENC_BSDMA_SET2 MTK_M4U_ID(M4U_LARB5_ID, 4)
96 #define M4U_PORT_VENC_CUR_LUMA_SET2 MTK_M4U_ID(M4U_LARB5_ID, 5)
97 #define M4U_PORT_VENC_CUR_CHROMA_SET2 MTK_M4U_ID(M4U_LARB5_ID, 6)
98 #define M4U_PORT_VENC_RD_COMA_SET2 MTK_M4U_ID(M4U_LARB5_ID, 7)
99 #define M4U_PORT_VENC_SV_COMA_SET2 MTK_M4U_ID(M4U_LARB5_ID, 8
    [all...]
mt2712-larb-port.h 18 #define M4U_LARB5_ID 5
73 #define M4U_PORT_DISP_OVL2 MTK_M4U_ID(M4U_LARB5_ID, 0)
74 #define M4U_PORT_DISP_WDMA2 MTK_M4U_ID(M4U_LARB5_ID, 1)
75 #define M4U_PORT_MDP_RDMA2 MTK_M4U_ID(M4U_LARB5_ID, 2)
76 #define M4U_PORT_MDP_WROT0 MTK_M4U_ID(M4U_LARB5_ID, 3)

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