Searched refs:M4U_PORT_DISP_WDMA0 (Results 1 - 9 of 9) sorted by relevance

/src/sys/external/gpl2/dts/dist/include/dt-bindings/memory/
H A Dmt8167-larb-port.h22 #define M4U_PORT_DISP_WDMA0 MTK_M4U_ID(M4U_LARB0_ID, 2) macro
H A Dmt2712-larb-port.h27 #define M4U_PORT_DISP_WDMA0 MTK_M4U_ID(M4U_LARB0_ID, 2) macro
H A Dmt8173-larb-port.h23 #define M4U_PORT_DISP_WDMA0 MTK_M4U_ID(M4U_LARB0_ID, 2) macro
H A Dmediatek,mt8365-larb-port.h22 #define M4U_PORT_DISP_WDMA0 MTK_M4U_ID(M4U_LARB0_ID, 3) macro
H A Dmt6795-larb-port.h24 #define M4U_PORT_DISP_WDMA0 MTK_M4U_ID(M4U_LARB0_ID, 3) macro
H A Dmt8183-larb-port.h28 #define M4U_PORT_DISP_WDMA0 MTK_M4U_ID(M4U_LARB0_ID, 5) macro
H A Dmt6779-larb-port.h35 #define M4U_PORT_DISP_WDMA0 MTK_M4U_ID(M4U_LARB0_ID, 7) macro
/src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/mediatek/
H A Dmt6795.dtsi788 iommus = <&iommu M4U_PORT_DISP_WDMA0>;
H A Dmt8173.dtsi1130 iommus = <&iommu M4U_PORT_DISP_WDMA0>;

Completed in 7 milliseconds