Searched refs:M4U_PORT_L5_SVPP1_MDP_OVL (Results 1 - 3 of 3) sorted by relevance

/src/sys/external/gpl2/dts/dist/include/dt-bindings/memory/
H A Dmt8195-memory-port.h78 #define M4U_PORT_L5_SVPP1_MDP_OVL MTK_M4U_ID(5, 2) macro
H A Dmediatek,mt8188-memory-port.h117 #define M4U_PORT_L5_SVPP1_MDP_OVL MTK_M4U_ID(SMI_L5_ID, 2) macro
/src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/mediatek/
H A Dmt8195.dtsi2510 iommus = <&iommu_vdo M4U_PORT_L5_SVPP1_MDP_OVL>;

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