HomeSort by: relevance | last modified time | path
    Searched refs:MC_SEQ_PMG_CMD_MRS1_LP (Results 1 - 12 of 12) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/radeon/
btcd.h 164 #define MC_SEQ_PMG_CMD_MRS1_LP 0x2b48
nid.h 822 #define MC_SEQ_PMG_CMD_MRS1_LP 0x2b48
radeon_btc_dpm.c 1896 *out_reg = MC_SEQ_PMG_CMD_MRS1_LP >> 2;
1962 table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_MRS1_LP >> 2;
2045 WREG32(MC_SEQ_PMG_CMD_MRS1_LP, RREG32(MC_PMG_CMD_MRS1));
radeon_ni_dpm.c 2753 table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_MRS1_LP >> 2;
2808 *out_reg = MC_SEQ_PMG_CMD_MRS1_LP >> 2;
2893 WREG32(MC_SEQ_PMG_CMD_MRS1_LP, RREG32(MC_PMG_CMD_MRS1));
cikd.h 715 #define MC_SEQ_PMG_CMD_MRS1_LP 0x2b48
sid.h 590 #define MC_SEQ_PMG_CMD_MRS1_LP 0x2b48
radeon_ci_dpm.c 4393 table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_MRS1_LP >> 2;
4467 *out_reg = MC_SEQ_PMG_CMD_MRS1_LP >> 2;
4654 WREG32(MC_SEQ_PMG_CMD_MRS1_LP, RREG32(MC_PMG_CMD_MRS1));
evergreend.h 340 #define MC_SEQ_PMG_CMD_MRS1_LP 0x2b48
radeon_cypress_dpm.c 1017 eg_pi->mc_reg_table.mc_reg_address[i].s0 = MC_SEQ_PMG_CMD_MRS1_LP >> 2;
radeon_si_dpm.c 5410 table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_MRS1_LP >> 2;
5465 *out_reg = MC_SEQ_PMG_CMD_MRS1_LP >> 2;
5554 WREG32(MC_SEQ_PMG_CMD_MRS1_LP, RREG32(MC_PMG_CMD_MRS1));
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
sid.h 592 #define MC_SEQ_PMG_CMD_MRS1_LP 0xAD2
amdgpu_si_dpm.c 5869 table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_MRS1_LP;
5921 *out_reg = MC_SEQ_PMG_CMD_MRS1_LP;
6010 WREG32(MC_SEQ_PMG_CMD_MRS1_LP, RREG32(MC_PMG_CMD_MRS1));

Completed in 51 milliseconds