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Searched refs:MC_SEQ_RD_CTL_D0_LP (Results 1 - 12 of 12) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/radeon/
btcd.h	`160 #define MC_SEQ_RD_CTL_D0_LP 0x2b1c`
nid.h	`818 #define MC_SEQ_RD_CTL_D0_LP 0x2b1c`
cikd.h	`711 #define MC_SEQ_RD_CTL_D0_LP 0x2b1c`
sid.h	`586 #define MC_SEQ_RD_CTL_D0_LP 0x2b1c`
radeon_btc_dpm.c	`1878 *out_reg = MC_SEQ_RD_CTL_D0_LP >> 2; 2039 WREG32(MC_SEQ_RD_CTL_D0_LP, RREG32(MC_SEQ_RD_CTL_D0));`
evergreend.h	`336 #define MC_SEQ_RD_CTL_D0_LP 0x2b1c`
radeon_cypress_dpm.c	`993 eg_pi->mc_reg_table.mc_reg_address[i].s0 = MC_SEQ_RD_CTL_D0_LP >> 2;`
radeon_ni_dpm.c	`2790 *out_reg = MC_SEQ_RD_CTL_D0_LP >> 2; 2896 WREG32(MC_SEQ_RD_CTL_D0_LP, RREG32(MC_SEQ_RD_CTL_D0));`
radeon_ci_dpm.c	`4449 *out_reg = MC_SEQ_RD_CTL_D0_LP >> 2; 4657 WREG32(MC_SEQ_RD_CTL_D0_LP, RREG32(MC_SEQ_RD_CTL_D0));`
radeon_si_dpm.c	`5447 *out_reg = MC_SEQ_RD_CTL_D0_LP >> 2; 5557 WREG32(MC_SEQ_RD_CTL_D0_LP, RREG32(MC_SEQ_RD_CTL_D0));`
/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
sid.h	`588 #define MC_SEQ_RD_CTL_D0_LP 0xAC7`
amdgpu_si_dpm.c	`5903 *out_reg = MC_SEQ_RD_CTL_D0_LP; 6013 WREG32(MC_SEQ_RD_CTL_D0_LP, RREG32(MC_SEQ_RD_CTL_D0));`

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