| /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| R600MachineFunctionInfo.cpp | 14 R600MachineFunctionInfo::R600MachineFunctionInfo(const MachineFunction &MF)
15 : AMDGPUMachineFunction(MF) { }
|
| SIFrameLowering.h | 28 void emitEntryFunctionPrologue(MachineFunction &MF,
30 void emitPrologue(MachineFunction &MF,
32 void emitEpilogue(MachineFunction &MF,
34 StackOffset getFrameIndexReference(const MachineFunction &MF, int FI,
37 void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
39 void determineCalleeSavesSGPR(MachineFunction &MF, BitVector &SavedRegs,
42 assignCalleeSavedSpillSlots(MachineFunction &MF,
49 MachineFunction &MF,
53 eliminateCallFramePseudoInstr(MachineFunction &MF,
58 void emitEntryFunctionFlatScratchInit(MachineFunction &MF,
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| ARMMachineFunctionInfo.cpp | 16 ARMFunctionInfo::ARMFunctionInfo(MachineFunction &MF)
17 : isThumb(MF.getSubtarget<ARMSubtarget>().isThumb()),
18 hasThumb2(MF.getSubtarget<ARMSubtarget>().hasThumb2()),
19 IsCmseNSEntry(MF.getFunction().hasFnAttribute("cmse_nonsecure_entry")),
20 IsCmseNSCall(MF.getFunction().hasFnAttribute("cmse_nonsecure_call")) {}
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/ |
| WebAssemblyFrameLowering.h | 37 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
41 void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
42 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
44 bool hasFP(const MachineFunction &MF) const override;
45 bool hasReservedCallFrame(const MachineFunction &MF) const override;
46 DwarfFrameBase getDwarfFrameBase(const MachineFunction &MF) const override;
48 bool needsPrologForEH(const MachineFunction &MF) const;
51 void writeSPToGlobal(unsigned SrcReg, MachineFunction &MF,
56 static unsigned getSPReg(const MachineFunction &MF);
57 static unsigned getFPReg(const MachineFunction &MF);
[all...] |
| WebAssemblyFrameLowering.cpp | 46 bool WebAssemblyFrameLowering::hasBP(const MachineFunction &MF) const {
48 MF.getSubtarget<WebAssemblySubtarget>().getRegisterInfo();
49 return RegInfo->hasStackRealignment(MF);
54 bool WebAssemblyFrameLowering::hasFP(const MachineFunction &MF) const {
55 const MachineFrameInfo &MFI = MF.getFrameInfo();
64 bool NeedsFixedReference = !hasBP(MF) || HasFixedSizedObjects;
77 const MachineFunction &MF) const {
78 return !MF.getFrameInfo().hasVarSizedObjects();
84 const MachineFunction &MF) const {
85 auto &MFI = MF.getFrameInfo()
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/ARC/ |
| ARCRegisterInfo.h | 31 const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override;
33 BitVector getReservedRegs(const MachineFunction &MF) const override;
35 bool requiresRegisterScavenging(const MachineFunction &MF) const override;
37 bool useFPForScavengingIndex(const MachineFunction &MF) const override;
43 const uint32_t *getCallPreservedMask(const MachineFunction &MF,
47 Register getFrameRegister(const MachineFunction &MF) const override;
50 static bool needsFrameMoves(const MachineFunction &MF);
|
| /src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/ |
| GISelChangeObserver.cpp | 32 RAIIDelegateInstaller::RAIIDelegateInstaller(MachineFunction &MF,
34 : MF(MF), Delegate(Del) {
37 MF.setDelegate(Del);
40 RAIIDelegateInstaller::~RAIIDelegateInstaller() { MF.resetDelegate(Delegate); }
42 RAIIMFObserverInstaller::RAIIMFObserverInstaller(MachineFunction &MF,
44 : MF(MF) {
45 MF.setObserver(&Observer);
48 RAIIMFObserverInstaller::~RAIIMFObserverInstaller() { MF.setObserver(nullptr);
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| TargetOptionsImpl.cpp | 24 bool TargetOptions::DisableFramePointerElim(const MachineFunction &MF) const {
26 if (MF.getSubtarget().getFrameLowering()->keepFramePointer(MF))
29 const Function &F = MF.getFunction();
37 return MF.getFrameInfo().hasCalls();
|
| EHContGuardCatchret.cpp | 49 bool runOnMachineFunction(MachineFunction &MF) override;
63 bool EHContGuardCatchret::runOnMachineFunction(MachineFunction &MF) {
66 if (!MF.getMMI().getModule()->getModuleFlag("ehcontguard"))
70 if (!MF.hasEHCatchret())
75 for (MachineBasicBlock &MBB : MF) {
77 MF.addCatchretTarget(MBB.getEHCatchretSymbol());
|
| TargetFrameLoweringImpl.cpp | 33 bool TargetFrameLowering::enableCalleeSaveSkip(const MachineFunction &MF) const {
34 assert(MF.getFunction().hasFnAttribute(Attribute::NoReturn) &&
35 MF.getFunction().hasFnAttribute(Attribute::NoUnwind) &&
36 !MF.getFunction().hasFnAttribute(Attribute::UWTable));
45 TargetFrameLowering::getFrameIndexReference(const MachineFunction &MF, int FI,
47 const MachineFrameInfo &MFI = MF.getFrameInfo();
48 const TargetRegisterInfo *RI = MF.getSubtarget().getRegisterInfo();
53 FrameReg = RI->getFrameRegister(MF);
61 const MachineFunction &MF) const {
62 return MF.getFrameInfo().hasStackObjects()
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/ |
| LanaiRegisterInfo.h | 26 const uint32_t *getCallPreservedMask(const MachineFunction &MF,
31 getCalleeSavedRegs(const MachineFunction *MF = nullptr) const override;
33 BitVector getReservedRegs(const MachineFunction &MF) const override;
35 bool requiresRegisterScavenging(const MachineFunction &MF) const override;
43 Register getFrameRegister(const MachineFunction &MF) const override;
45 bool hasBasePointer(const MachineFunction &MF) const;
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/NVPTX/ |
| NVPTXFrameLowering.h | 25 bool hasFP(const MachineFunction &MF) const override;
26 void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
27 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
28 StackOffset getFrameIndexReference(const MachineFunction &MF, int FI,
32 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
34 DwarfFrameBase getDwarfFrameBase(const MachineFunction &MF) const override;
|
| NVPTXFrameLowering.cpp | 30 bool NVPTXFrameLowering::hasFP(const MachineFunction &MF) const { return true; }
32 void NVPTXFrameLowering::emitPrologue(MachineFunction &MF,
34 if (MF.getFrameInfo().hasStackObjects()) {
35 assert(&MF.front() == &MBB && "Shrink-wrapping not yet supported");
37 MachineRegisterInfo &MR = MF.getRegInfo();
46 // for local address accesses in MF.
48 static_cast<const NVPTXTargetMachine &>(MF.getTarget()).is64Bit();
56 MF.getSubtarget().getInstrInfo()->get(CvtaLocalOpcode),
60 BuildMI(MBB, MI, dl, MF.getSubtarget().getInstrInfo()->get(MovDepotOpcode),
62 .addImm(MF.getFunctionNumber())
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/XCore/ |
| XCoreRegisterInfo.h | 29 const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override;
31 BitVector getReservedRegs(const MachineFunction &MF) const override;
33 bool requiresRegisterScavenging(const MachineFunction &MF) const override;
35 bool useFPForScavengingIndex(const MachineFunction &MF) const override;
42 Register getFrameRegister(const MachineFunction &MF) const override;
45 static bool needsFrameMoves(const MachineFunction &MF);
|
| XCoreMachineFunctionInfo.cpp | 18 bool XCoreFunctionInfo::isLargeFrame(const MachineFunction &MF) const {
20 CachedEStackSize = MF.getFrameInfo().estimateStackSize(MF);
34 int XCoreFunctionInfo::createLRSpillSlot(MachineFunction &MF) {
39 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo();
40 MachineFrameInfo &MFI = MF.getFrameInfo();
41 if (! MF.getFunction().isVarArg()) {
52 int XCoreFunctionInfo::createFPSpillSlot(MachineFunction &MF) {
57 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo();
58 MachineFrameInfo &MFI = MF.getFrameInfo()
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| PPCMachineFunctionInfo.cpp | 23 PPCFunctionInfo::PPCFunctionInfo(const MachineFunction &MF)
26 MCSymbol *PPCFunctionInfo::getPICOffsetSymbol(MachineFunction &MF) const {
27 const DataLayout &DL = MF.getDataLayout();
28 return MF.getContext().getOrCreateSymbol(Twine(DL.getPrivateGlobalPrefix()) +
29 Twine(MF.getFunctionNumber()) +
33 MCSymbol *PPCFunctionInfo::getGlobalEPSymbol(MachineFunction &MF) const {
34 const DataLayout &DL = MF.getDataLayout();
35 return MF.getContext().getOrCreateSymbol(Twine(DL.getPrivateGlobalPrefix()) +
37 Twine(MF.getFunctionNumber()));
40 MCSymbol *PPCFunctionInfo::getLocalEPSymbol(MachineFunction &MF) const
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/MSP430/ |
| MSP430RegisterInfo.h | 28 const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override;
30 BitVector getReservedRegs(const MachineFunction &MF) const override;
32 getPointerRegClass(const MachineFunction &MF,
40 Register getFrameRegister(const MachineFunction &MF) const override;
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/ |
| SystemZFrameLowering.h | 30 assignCalleeSavedSpillSlots(MachineFunction &MF,
33 void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
44 void processFunctionBeforeFrameFinalized(MachineFunction &MF,
46 void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
47 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
48 void inlineStackProbe(MachineFunction &MF,
50 bool hasFP(const MachineFunction &MF) const override;
51 bool hasReservedCallFrame(const MachineFunction &MF) const override;
52 StackOffset getFrameIndexReference(const MachineFunction &MF, int FI,
55 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/BPF/ |
| BPFFrameLowering.cpp | 23 bool BPFFrameLowering::hasFP(const MachineFunction &MF) const { return true; }
25 void BPFFrameLowering::emitPrologue(MachineFunction &MF,
28 void BPFFrameLowering::emitEpilogue(MachineFunction &MF,
31 void BPFFrameLowering::determineCalleeSaves(MachineFunction &MF,
34 TargetFrameLowering::determineCalleeSaves(MF, SavedRegs, RS);
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/VE/ |
| VERegisterInfo.h | 27 const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override;
28 const uint32_t *getCallPreservedMask(const MachineFunction &MF,
32 BitVector getReservedRegs(const MachineFunction &MF) const override;
35 const TargetRegisterClass *getPointerRegClass(const MachineFunction &MF,
42 Register getFrameRegister(const MachineFunction &MF) const override;
|
| VEFrameLowering.h | 29 void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
30 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
31 void emitPrologueInsns(MachineFunction &MF, MachineBasicBlock &MBB,
34 void emitEpilogueInsns(MachineFunction &MF, MachineBasicBlock &MBB,
39 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
42 bool hasFP(const MachineFunction &MF) const override;
43 bool hasBP(const MachineFunction &MF) const;
44 bool hasGOT(const MachineFunction &MF) const;
48 bool hasReservedCallFrame(const MachineFunction &MF) const override {
51 void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/AVR/ |
| AVRFrameLowering.h | 22 void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
23 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
24 bool hasFP(const MachineFunction &MF) const override;
34 bool hasReservedCallFrame(const MachineFunction &MF) const override;
35 bool canSimplifyCallFramePseudos(const MachineFunction &MF) const override;
36 void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
39 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
| MipsSEFrameLowering.h | 26 void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
27 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
29 StackOffset getFrameIndexReference(const MachineFunction &MF, int FI,
37 bool hasReservedCallFrame(const MachineFunction &MF) const override;
39 void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
43 void emitInterruptEpilogueStub(MachineFunction &MF,
45 void emitInterruptPrologueStub(MachineFunction &MF,
|
| MipsFrameLowering.cpp | 93 bool MipsFrameLowering::hasFP(const MachineFunction &MF) const {
94 const MachineFrameInfo &MFI = MF.getFrameInfo();
97 return MF.getTarget().Options.DisableFramePointerElim(MF) ||
99 TRI->hasStackRealignment(MF);
102 bool MipsFrameLowering::hasBP(const MachineFunction &MF) const {
103 const MachineFrameInfo &MFI = MF.getFrameInfo();
106 return MFI.hasVarSizedObjects() && TRI->hasStackRealignment(MF);
114 uint64_t MipsFrameLowering::estimateStackSize(const MachineFunction &MF) const {
115 const MachineFrameInfo &MFI = MF.getFrameInfo()
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| X86RegisterInfo.h | 71 const MachineFunction &MF) const override;
81 getPointerRegClass(const MachineFunction &MF,
93 getGPRsForTailCall(const MachineFunction &MF) const;
96 MachineFunction &MF) const override;
101 getCalleeSavedRegs(const MachineFunction* MF) const override;
103 getCalleeSavedRegsViaCopy(const MachineFunction *MF) const;
104 const uint32_t *getCallPreservedMask(const MachineFunction &MF,
116 BitVector getReservedRegs(const MachineFunction &MF) const override;
120 bool hasBasePointer(const MachineFunction &MF) const;
122 bool canRealignStack(const MachineFunction &MF) const override
[all...] |
