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      1 //===-- MipsFrameLowering.cpp - Mips Frame Information --------------------===//
      2 //
      3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
      4 // See https://llvm.org/LICENSE.txt for license information.
      5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
      6 //
      7 //===----------------------------------------------------------------------===//
      8 //
      9 // This file contains the Mips implementation of TargetFrameLowering class.
     10 //
     11 //===----------------------------------------------------------------------===//
     12 
     13 #include "MipsFrameLowering.h"
     14 #include "MCTargetDesc/MipsBaseInfo.h"
     15 #include "MipsInstrInfo.h"
     16 #include "MipsMachineFunction.h"
     17 #include "MipsTargetMachine.h"
     18 #include "llvm/CodeGen/MachineFrameInfo.h"
     19 #include "llvm/CodeGen/MachineFunction.h"
     20 #include "llvm/CodeGen/MachineInstrBuilder.h"
     21 #include "llvm/CodeGen/MachineModuleInfo.h"
     22 #include "llvm/CodeGen/MachineRegisterInfo.h"
     23 #include "llvm/IR/DataLayout.h"
     24 #include "llvm/IR/Function.h"
     25 #include "llvm/Target/TargetOptions.h"
     26 
     27 using namespace llvm;
     28 
     29 
     30 //===----------------------------------------------------------------------===//
     31 //
     32 // Stack Frame Processing methods
     33 // +----------------------------+
     34 //
     35 // The stack is allocated decrementing the stack pointer on
     36 // the first instruction of a function prologue. Once decremented,
     37 // all stack references are done thought a positive offset
     38 // from the stack/frame pointer, so the stack is considering
     39 // to grow up! Otherwise terrible hacks would have to be made
     40 // to get this stack ABI compliant :)
     41 //
     42 //  The stack frame required by the ABI (after call):
     43 //  Offset
     44 //
     45 //  0                 ----------
     46 //  4                 Args to pass
     47 //  .                 saved $GP  (used in PIC)
     48 //  .                 Alloca allocations
     49 //  .                 Local Area
     50 //  .                 CPU "Callee Saved" Registers
     51 //  .                 saved FP
     52 //  .                 saved RA
     53 //  .                 FPU "Callee Saved" Registers
     54 //  StackSize         -----------
     55 //
     56 // Offset - offset from sp after stack allocation on function prologue
     57 //
     58 // The sp is the stack pointer subtracted/added from the stack size
     59 // at the Prologue/Epilogue
     60 //
     61 // References to the previous stack (to obtain arguments) are done
     62 // with offsets that exceeds the stack size: (stacksize+(4*(num_arg-1))
     63 //
     64 // Examples:
     65 // - reference to the actual stack frame
     66 //   for any local area var there is smt like : FI >= 0, StackOffset: 4
     67 //     sw REGX, 4(SP)
     68 //
     69 // - reference to previous stack frame
     70 //   suppose there's a load to the 5th arguments : FI < 0, StackOffset: 16.
     71 //   The emitted instruction will be something like:
     72 //     lw REGX, 16+StackSize(SP)
     73 //
     74 // Since the total stack size is unknown on LowerFormalArguments, all
     75 // stack references (ObjectOffset) created to reference the function
     76 // arguments, are negative numbers. This way, on eliminateFrameIndex it's
     77 // possible to detect those references and the offsets are adjusted to
     78 // their real location.
     79 //
     80 //===----------------------------------------------------------------------===//
     81 
     82 const MipsFrameLowering *MipsFrameLowering::create(const MipsSubtarget &ST) {
     83   if (ST.inMips16Mode())
     84     return llvm::createMips16FrameLowering(ST);
     85 
     86   return llvm::createMipsSEFrameLowering(ST);
     87 }
     88 
     89 // hasFP - Return true if the specified function should have a dedicated frame
     90 // pointer register.  This is true if the function has variable sized allocas,
     91 // if it needs dynamic stack realignment, if frame pointer elimination is
     92 // disabled, or if the frame address is taken.
     93 bool MipsFrameLowering::hasFP(const MachineFunction &MF) const {
     94   const MachineFrameInfo &MFI = MF.getFrameInfo();
     95   const TargetRegisterInfo *TRI = STI.getRegisterInfo();
     96 
     97   return MF.getTarget().Options.DisableFramePointerElim(MF) ||
     98          MFI.hasVarSizedObjects() || MFI.isFrameAddressTaken() ||
     99          TRI->hasStackRealignment(MF);
    100 }
    101 
    102 bool MipsFrameLowering::hasBP(const MachineFunction &MF) const {
    103   const MachineFrameInfo &MFI = MF.getFrameInfo();
    104   const TargetRegisterInfo *TRI = STI.getRegisterInfo();
    105 
    106   return MFI.hasVarSizedObjects() && TRI->hasStackRealignment(MF);
    107 }
    108 
    109 // Estimate the size of the stack, including the incoming arguments. We need to
    110 // account for register spills, local objects, reserved call frame and incoming
    111 // arguments. This is required to determine the largest possible positive offset
    112 // from $sp so that it can be determined if an emergency spill slot for stack
    113 // addresses is required.
    114 uint64_t MipsFrameLowering::estimateStackSize(const MachineFunction &MF) const {
    115   const MachineFrameInfo &MFI = MF.getFrameInfo();
    116   const TargetRegisterInfo &TRI = *STI.getRegisterInfo();
    117 
    118   int64_t Size = 0;
    119 
    120   // Iterate over fixed sized objects which are incoming arguments.
    121   for (int I = MFI.getObjectIndexBegin(); I != 0; ++I)
    122     if (MFI.getObjectOffset(I) > 0)
    123       Size += MFI.getObjectSize(I);
    124 
    125   // Conservatively assume all callee-saved registers will be saved.
    126   for (const MCPhysReg *R = TRI.getCalleeSavedRegs(&MF); *R; ++R) {
    127     unsigned RegSize = TRI.getSpillSize(*TRI.getMinimalPhysRegClass(*R));
    128     Size = alignTo(Size + RegSize, RegSize);
    129   }
    130 
    131   // Get the size of the rest of the frame objects and any possible reserved
    132   // call frame, accounting for alignment.
    133   return Size + MFI.estimateStackSize(MF);
    134 }
    135 
    136 // Eliminate ADJCALLSTACKDOWN, ADJCALLSTACKUP pseudo instructions
    137 MachineBasicBlock::iterator MipsFrameLowering::
    138 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
    139                               MachineBasicBlock::iterator I) const {
    140   unsigned SP = STI.getABI().IsN64() ? Mips::SP_64 : Mips::SP;
    141 
    142   if (!hasReservedCallFrame(MF)) {
    143     int64_t Amount = I->getOperand(0).getImm();
    144     if (I->getOpcode() == Mips::ADJCALLSTACKDOWN)
    145       Amount = -Amount;
    146 
    147     STI.getInstrInfo()->adjustStackPtr(SP, Amount, MBB, I);
    148   }
    149 
    150   return MBB.erase(I);
    151 }
    152