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    Searched refs:MTYPE_UC (Results 1 - 25 of 32) sorted by relevancy

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  /src/sys/external/bsd/drm2/dist/drm/amd/amdkfd/
kfd_device_queue_manager_vi.c 142 MTYPE_UC :
146 MTYPE_UC :
212 MTYPE_UC <<
214 MTYPE_UC <<
kfd_mqd_manager_vi.c 118 MTYPE_UC << CP_MQD_CONTROL__MTYPE__SHIFT;
254 __update_mqd(mm, mqd, q, MTYPE_UC, 0);
320 __update_mqd(mm, mqd, q, MTYPE_UC, 0);
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_gfxhub_v1_0.c 139 MTYPE, MTYPE_UC);/* XXX for emulation. */
amdgpu_gfxhub_v2_0.c 134 MTYPE, MTYPE_UC); /* UC, uncached */
amdgpu_mmhub_v2_0.c 121 MTYPE, MTYPE_UC); /* UC, uncached */
amdgpu_gmc_v10_0.c 563 return AMDGPU_PTE_MTYPE_NV10(MTYPE_UC);
735 adev->gart.gart_pte_flags = AMDGPU_PTE_MTYPE_NV10(MTYPE_UC) |
amdgpu_gmc_v9_0.c 731 return AMDGPU_PTE_MTYPE_VG10(MTYPE_UC);
1028 adev->gart.gart_pte_flags = AMDGPU_PTE_MTYPE_VG10(MTYPE_UC) |
amdgpu_mmhub_v1_0.c 156 MTYPE, MTYPE_UC);/* XXX for emulation. */
amdgpu_mmhub_v9_4.c 205 MTYPE, MTYPE_UC);/* XXX for emulation. */
amdgpu_gfx_v8_0.c 3788 tmp = REG_SET_FIELD(0, SH_MEM_CONFIG, DEFAULT_MTYPE, MTYPE_UC);
3789 tmp = REG_SET_FIELD(tmp, SH_MEM_CONFIG, APE1_MTYPE, MTYPE_UC);
3796 tmp = REG_SET_FIELD(tmp, SH_MEM_CONFIG, APE1_MTYPE, MTYPE_UC);
amdgpu_gfx_v7_0.c 1969 MTYPE_UC);
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/bif/
bif_5_1_enum.h 996 MTYPE_UC = 0x3,
bif_5_0_enum.h 1126 MTYPE_UC = 0x3,
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gmc/
gmc_8_2_enum.h 996 MTYPE_UC = 0x3,
gmc_8_1_enum.h 1126 MTYPE_UC = 0x3,
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/smu/
smu_8_0_enum.h 996 MTYPE_UC = 0x3,
smu_7_1_1_enum.h 1156 MTYPE_UC = 0x3,
smu_7_1_2_enum.h 1174 MTYPE_UC = 0x3,
smu_7_1_3_enum.h 1210 MTYPE_UC = 0x3,
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/uvd/
uvd_6_0_enum.h 1009 MTYPE_UC = 0x3,
uvd_5_0_enum.h 1139 MTYPE_UC = 0x3,
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/oss/
oss_2_4_enum.h 1291 MTYPE_UC = 0x3,
oss_3_0_1_enum.h 1392 MTYPE_UC = 0x3,
oss_3_0_enum.h 1425 MTYPE_UC = 0x3,
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dce/
dce_10_0_enum.h 1701 MTYPE_UC = 0x3,

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