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    Searched refs:OUTPUT_CSC_CONTROL (Results 1 - 4 of 4) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/
amdgpu_dce_transform.c 1009 REG_SET(OUTPUT_CSC_CONTROL, 0,
1014 REG_SET(OUTPUT_CSC_CONTROL, 0,
1021 REG_SET(OUTPUT_CSC_CONTROL, 0,
1026 REG_SET(OUTPUT_CSC_CONTROL, 0,
1032 REG_SET(OUTPUT_CSC_CONTROL, 0,
1038 REG_SET(OUTPUT_CSC_CONTROL, 0,
1049 REG_SET(OUTPUT_CSC_CONTROL, 0,
1055 REG_SET(OUTPUT_CSC_CONTROL, 0,
1061 REG_SET(OUTPUT_CSC_CONTROL, 0,
1067 REG_SET(OUTPUT_CSC_CONTROL, 0
    [all...]
dce_transform.h 55 SRI(OUTPUT_CSC_CONTROL, DCP, id), \
148 XFM_SF(OUTPUT_CSC_CONTROL, OUTPUT_CSC_GRPH_MODE, mask_sh),\
402 uint32_t OUTPUT_CSC_CONTROL;
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_dce_v10_0.c 2185 tmp = REG_SET_FIELD(tmp, OUTPUT_CSC_CONTROL, OUTPUT_CSC_GRPH_MODE, 0);
2186 tmp = REG_SET_FIELD(tmp, OUTPUT_CSC_CONTROL, OUTPUT_CSC_OVL_MODE, 0);
amdgpu_dce_v11_0.c 2219 tmp = REG_SET_FIELD(tmp, OUTPUT_CSC_CONTROL, OUTPUT_CSC_GRPH_MODE, 0);

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