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Searched refs:PA_CL_ENHANCE__CLIP_VTX_REORDER_ENA_MASK (Results 1 - 10 of 10) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_gfx_v6_0.c	`1780 WREG32(mmPA_CL_ENHANCE, PA_CL_ENHANCE__CLIP_VTX_REORDER_ENA_MASK \|`
amdgpu_gfx_v7_0.c	`2048 WREG32(mmPA_CL_ENHANCE, PA_CL_ENHANCE__CLIP_VTX_REORDER_ENA_MASK \|`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
gfx_6_0_sh_mask.h	`5608 #define PA_CL_ENHANCE__CLIP_VTX_REORDER_ENA_MASK 0x00000001L`
gfx_7_2_sh_mask.h	`5669 #define PA_CL_ENHANCE__CLIP_VTX_REORDER_ENA_MASK 0x1`
gfx_8_0_sh_mask.h	`6457 #define PA_CL_ENHANCE__CLIP_VTX_REORDER_ENA_MASK 0x1 [all...]`
gfx_8_1_sh_mask.h	`6991 #define PA_CL_ENHANCE__CLIP_VTX_REORDER_ENA_MASK 0x1 [all...]`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_9_0_sh_mask.h	`1647 #define PA_CL_ENHANCE__CLIP_VTX_REORDER_ENA_MASK 0x00000001L [all...]`
gc_9_1_sh_mask.h	`1509 #define PA_CL_ENHANCE__CLIP_VTX_REORDER_ENA_MASK 0x00000001L [all...]`
gc_9_2_1_sh_mask.h	`1478 #define PA_CL_ENHANCE__CLIP_VTX_REORDER_ENA_MASK 0x00000001L [all...]`
gc_10_1_0_sh_mask.h	`7169 #define PA_CL_ENHANCE__CLIP_VTX_REORDER_ENA_MASK 0x00000001L [all...]`

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