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    Searched refs:PCIC_INTR (Results 1 - 5 of 5) sorted by relevancy

  /src/sys/arch/hpcmips/vr/
vrecu.c 218 r = pcic_read(h, PCIC_INTR);
220 pcic_write(h, PCIC_INTR, r | irq);
256 r = pcic_read(h, PCIC_INTR);
258 pcic_write(h, PCIC_INTR, r);
  /src/sys/dev/isa/
i82365_isasubr.c 195 intr = pcic_read(h, PCIC_INTR);
198 pcic_write(h, PCIC_INTR, intr);
343 pcic_intr, sc);
478 reg = pcic_read(h, PCIC_INTR);
480 pcic_write(h, PCIC_INTR, reg | irq);
503 reg = pcic_read(h, PCIC_INTR);
505 pcic_write(h, PCIC_INTR, reg);
  /src/sys/dev/ic/
i82365.c 301 pcic_write(h, PCIC_INTR, 0);
474 pcic_write(h, PCIC_INTR, PCIC_INTR_ENABLE);
658 pcic_intr(void *arg) function
790 intr = pcic_read(h, PCIC_INTR);
792 pcic_write(h, PCIC_INTR, intr);
1312 intr = pcic_read(h, PCIC_INTR);
1314 pcic_write(h, PCIC_INTR, intr);
1372 pcic_write(h, PCIC_INTR, intr);
1412 intr = pcic_read(h, PCIC_INTR);
1414 pcic_write(h, PCIC_INTR, intr)
    [all...]
i82365reg.h 133 #define PCIC_INTR 0x03 /* RW */
  /src/sys/dev/pci/
pccbb.c 896 bus_space_write_1(bmt, bmh, 0x800 + PCIC_INTR,
897 bus_space_read_1(bmt, bmh, 0x800 + PCIC_INTR) & ~PCIC_INTR_RESET);
964 * 2) Set bit 4 of PCIC_INTR, which is needed on some chips to enable
971 Pcic_write(sc, PCIC_INTR, PCIC_INTR_ENABLE);
2294 intr = Pcic_read(sc, PCIC_INTR);
2296 Pcic_write(sc, PCIC_INTR, intr);
2326 Pcic_write(sc, PCIC_INTR, intr);
2375 intr = Pcic_read(sc, PCIC_INTR);
2377 Pcic_write(sc, PCIC_INTR, intr);
2402 intr = Pcic_read(sc, PCIC_INTR);
    [all...]

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