| /src/sys/dev/pci/ |
| if_pcnreg.h | 54 #define PCN_PCI_CBIO (PCI_MAPREG_START + 0x00)
55 #define PCN_PCI_CBMEM (PCI_MAPREG_START + 0x04)
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| pciide_sl82c105_reg.h | 40 #define SYMPH_PORT0_P (PCI_MAPREG_START + 0x00) /* port 0 primary */
41 #define SYMPH_PORT0_S (PCI_MAPREG_START + 0x04) /* port 0 secondary */
42 #define SYMPH_PORT1_P (PCI_MAPREG_START + 0x08) /* port 1 primary */
43 #define SYMPH_PORT1_S (PCI_MAPREG_START + 0x0c) /* port 1 secondary */
44 #define SYMPH_BMIDER (PCI_MAPREG_START + 0x10) /* bus master regs */
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| if_fxp_pci.c | 273 pci_conf_write(psc->psc_pc, psc->psc_tag, PCI_MAPREG_START+0x0,
274 psc->psc_regs[(PCI_MAPREG_START+0x0)>>2]);
275 pci_conf_write(psc->psc_pc, psc->psc_tag, PCI_MAPREG_START+0x4,
276 psc->psc_regs[(PCI_MAPREG_START+0x4)>>2]);
277 pci_conf_write(psc->psc_pc, psc->psc_tag, PCI_MAPREG_START+0x8,
278 psc->psc_regs[(PCI_MAPREG_START+0x8)>>2]);
501 psc->psc_regs[(PCI_MAPREG_START+0x0)>>2] =
502 pci_conf_read(pc, pa->pa_tag, PCI_MAPREG_START+0x0);
503 psc->psc_regs[(PCI_MAPREG_START+0x4)>>2] =
504 pci_conf_read(pc, pa->pa_tag, PCI_MAPREG_START+0x4)
[all...] |
| pucvar.h | 65 #define PUC_PORT_BAR_INDEX(bar) (((bar) - PCI_MAPREG_START) / 4)
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| pwdog.c | 87 memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, PCI_MAPREG_START);
88 if (pci_mapreg_map(pa, PCI_MAPREG_START, memtype, 0, &sc->sc_iot,
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| iha_pci.c | 129 ioh_valid = pci_mapreg_map(pa, PCI_MAPREG_START, PCI_MAPREG_TYPE_IO, 0,
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| joy_pci.c | 99 for (reg = PCI_MAPREG_START; reg < PCI_MAPREG_END;
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| /src/sys/arch/evbmips/loongson/dev/ |
| glx.c | 337 static const pcireg_t pcib_bar_sizes[(4 + PCI_MAPREG_END - PCI_MAPREG_START) / 4] = {
346 static pcireg_t pcib_bar_values[(4 + PCI_MAPREG_END - PCI_MAPREG_START) / 4];
348 static const uint64_t pcib_bar_msr[(4 + PCI_MAPREG_END - PCI_MAPREG_START) / 4] = {
388 case PCI_MAPREG_START + 0x00:
389 case PCI_MAPREG_START + 0x04:
390 case PCI_MAPREG_START + 0x08:
391 case PCI_MAPREG_START + 0x0c:
392 case PCI_MAPREG_START + 0x10:
393 case PCI_MAPREG_START + 0x14:
394 case PCI_MAPREG_START + 0x18
[all...] |
| /src/sys/arch/arm/xscale/ |
| i80321.c | 126 PCI_MAPREG_START, sc->sc_iwin[0].iwin_base_lo);
128 PCI_MAPREG_START + 0x04, sc->sc_iwin[0].iwin_base_hi);
131 sc->sc_atu_sh, PCI_MAPREG_START);
133 sc->sc_atu_sh, PCI_MAPREG_START + 0x04);
143 PCI_MAPREG_START + 0x08, sc->sc_iwin[1].iwin_base_lo);
145 PCI_MAPREG_START + 0x0c, sc->sc_iwin[1].iwin_base_hi);
148 sc->sc_atu_sh, PCI_MAPREG_START + 0x08);
150 sc->sc_atu_sh, PCI_MAPREG_START + 0x0c);
161 PCI_MAPREG_START + 0x10, sc->sc_iwin[2].iwin_base_lo);
163 PCI_MAPREG_START + 0x14, sc->sc_iwin[2].iwin_base_hi)
[all...] |
| becc.c | 119 becc_pcicore_write(sc, PCI_MAPREG_START + 0,
122 reg = becc_pcicore_read(sc, PCI_MAPREG_START + 0);
125 becc_pcicore_write(sc, PCI_MAPREG_START + 4,
128 reg = becc_pcicore_read(sc, PCI_MAPREG_START + 4);
135 becc_pcicore_write(sc, PCI_MAPREG_START + 8,
138 reg = becc_pcicore_read(sc, PCI_MAPREG_START + 8);
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| /src/sys/arch/evbarm/hdl_g/ |
| i80321_mainbus.c | 123 b0l = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, PCI_MAPREG_START+0x0);
124 b0u = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, PCI_MAPREG_START+0x4);
125 b1l = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, PCI_MAPREG_START+0x8);
126 b1u = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, PCI_MAPREG_START+0xc);
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| /src/sys/arch/evbarm/iq80321/ |
| i80321_mainbus.c | 140 b0l = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, PCI_MAPREG_START+0x0);
141 b0u = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, PCI_MAPREG_START+0x4);
142 b1l = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, PCI_MAPREG_START+0x8);
143 b1u = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, PCI_MAPREG_START+0xc);
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| /src/sys/arch/evbarm/iyonix/ |
| i80321_mainbus.c | 139 b0l = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, PCI_MAPREG_START+0x0);
140 b0u = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, PCI_MAPREG_START+0x4);
141 b1l = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, PCI_MAPREG_START+0x8);
142 b1u = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, PCI_MAPREG_START+0xc);
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| autoconf.c | 145 bar0 = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_MAPREG_START);
147 PCI_MAPREG_START + 0x04);
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| /src/sys/arch/iyonix/iyonix/ |
| i80321_mainbus.c | 139 b0l = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, PCI_MAPREG_START+0x0);
140 b0u = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, PCI_MAPREG_START+0x4);
141 b1l = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, PCI_MAPREG_START+0x8);
142 b1u = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, PCI_MAPREG_START+0xc);
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| autoconf.c | 145 bar0 = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_MAPREG_START);
147 PCI_MAPREG_START + 0x04);
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| /src/sys/arch/hpcmips/dev/ |
| mq200_pci.c | 92 res = pci_mapreg_map(pa, PCI_MAPREG_START, PCI_MAPREG_TYPE_MEM,
100 res = pci_mapreg_info(psc->sc_pc, psc->sc_pcitag, PCI_MAPREG_START+4,
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| /src/sys/arch/dreamcast/dev/g2/ |
| gapspci_pci.c | 109 PCI_MAPREG_START + 4, 0x01000000);
168 if (reg == (PCI_MAPREG_START + 4)) {
191 if (reg == (PCI_MAPREG_START + 4) && val != 0x01000000)
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| /src/sys/arch/evbarm/stand/board/ |
| becc_mem.c | 60 #define BECC_SDRAM_BAR (PCI_MAPREG_START + 0x08)
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| /src/sys/arch/hppa/dev/ |
| sti_pci_machdep.c | 64 for (bar = PCI_MAPREG_START; bar <= PCI_MAPREG_PPB_END; ) {
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| /src/sys/arch/evbmips/gdium/ |
| machdep.c | 159 v = pci_conf_read(pba->pba_pc, high_dev, PCI_MAPREG_START);
165 pci_mapreg_info(pba->pba_pc, high_dev, PCI_MAPREG_START,
167 pci_mapreg_info(pba->pba_pc, ralink_dev, PCI_MAPREG_START,
178 pci_conf_write(pba->pba_pc, ralink_dev, PCI_MAPREG_START, v);
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| gdium_genfb.c | 81 PCI_MAPREG_START);
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| /src/sys/arch/evbmips/loongson/ |
| gdium_machdep.c | 119 for (bar = PCI_MAPREG_START; bar < PCI_MAPREG_END; bar += 4)
128 pci_conf_write(pc, tag, PCI_MAPREG_START, 0x06228000);
355 reg = pci_conf_read(pc, tag, PCI_MAPREG_START);
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| /src/sys/arch/x86/pci/ |
| pci_addr_fixup.c | 181 reg_start = PCI_MAPREG_START;
185 reg_start = PCI_MAPREG_START;
189 reg_start = PCI_MAPREG_START;
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| /src/sys/arch/bebox/stand/boot/ |
| pci.c | 74 #define BAR_BASE (PCI_MAPREG_START >> 2)
|
