HomeSort by: relevance | last modified time | path
    Searched refs:PHASE (Results 1 - 11 of 11) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/
dce_clock_source.h 62 SRII(PHASE, DP_DTO, 0),\
63 SRII(PHASE, DP_DTO, 1),\
64 SRII(PHASE, DP_DTO, 2),\
65 SRII(PHASE, DP_DTO, 3),\
66 SRII(PHASE, DP_DTO, 4),\
67 SRII(PHASE, DP_DTO, 5),\
83 SRII(PHASE, DP_DTO, 0),\
84 SRII(PHASE, DP_DTO, 1),\
85 SRII(PHASE, DP_DTO, 2),\
86 SRII(PHASE, DP_DTO, 3),
    [all...]
amdgpu_dce_clock_source.c 919 /* Set DTO values: phase = target clock, modulo = reference clock */
920 REG_WRITE(PHASE[inst], clock_100hz);
999 clock_hz = REG_READ(PHASE[inst]);
1002 * programmed equal to DPREFCLK, in which case PHASE will be
  /src/sys/arch/amiga/dev/
scivar.h 91 #define PHASE 0x07 /* mask for psns/pctl phase */
sbicvar.h 166 #define PHASE 0x07 /* mask for psns/pctl phase */
  /src/sys/arch/mvme68k/dev/
sbicvar.h 153 #define PHASE 0x07 /* mask for psns/pctl phase */
  /src/sys/arch/luna68k/stand/boot/
sc.c 319 ixfer_start(struct scsidevice *hd, int len, uint8_t phase, int wait)
325 hd->scsi_pctl = phase;
423 printf("sc%d: abort phase=0x%x, ssts=0x%x, ints=0x%x\n",
448 if ((hd->scsi_psns & PHASE) == MESG_OUT_PHASE)
450 hd->scsi_pctl = hs->sc_phase = hd->scsi_psns & PHASE;
475 printf("sc%d: abort failed. phase=0x%x, ssts=0x%x\n",
711 hs->sc_phase = hd->scsi_psns & PHASE;
754 hs->sc_phase = hd->scsi_psns & PHASE;
scsireg.h 115 /* psns/pctl phase lines as bits */
119 /* Phase lines as values */
120 #define PHASE 0x07 /* mask for psns/pctl phase */
  /src/sys/arch/luna68k/dev/xplx/
xplx.asm 780 .PHASE 1000H
784 .PHASE 08000H
789 .PHASE 09000H
793 .PHASE 0A000H
799 .PHASE 0E000H
1504 .PHASE 0FE00H
1511 .PHASE 0FE00H
1618 .PHASE 0FE00H
1626 ; phase wait 28:28
1715 .PHASE 0FE00
    [all...]
  /src/sys/dev/ic/
wd33c93.c 976 * Returns the current CSR following selection and optionally MSG out phase.
977 * i.e. the returned CSR *should* indicate CMD phase...
997 SBIC_DEBUG(PHASE, ("wd33c93_selectbus %d: ", target));
1013 SBIC_DEBUG(PHASE, ("WD busy (reselect?) ASR=%02x\n", asr));
1036 SBIC_DEBUG(PHASE, ("got reselected, asr %02x\n", asr));
1057 SBIC_DEBUG(PHASE, ("-- Selection Timeout\n"));
1061 SBIC_DEBUG(PHASE, ("Selection Complete\n"));
1138 * the change to CMD phase...
1157 * CMD phase until the disk has spun up. Only then will the target change
1158 * to STATUS phase. This is really only a problem for immediate command
1271 u_char phase, csr; local in function:wd33c93_xferdone
    [all...]
  /src/sys/arch/hp300/stand/common/
scsi.c 210 ixfer_start(volatile struct scsidevice *hd, int len, uint8_t phase, int wait)
216 hd->scsi_pctl = phase;
271 uint8_t phase, ints; local in function:scsiicmd
280 * Wait for a phase change (or error) then let the device
284 phase = CMD_PHASE;
287 switch (phase) {
290 if (ixfer_start(hd, clen, phase, wait))
293 phase = xferphase;
300 if (ixfer_start(hd, len, phase, wait) ||
303 phase = STATUS_PHASE
    [all...]
scsireg.h 139 /* psns/pctl phase lines as bits */
143 /* Phase lines as values */
144 #define PHASE 0x07 /* mask for psns/pctl phase */

Completed in 19 milliseconds