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    Searched refs:PIPE_C (Results 1 - 20 of 20) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/i915/gvt/
handlers.c 645 calc_index(offset, _FDI_RXA_CTL, _FDI_RXB_CTL, 0, FDI_RX_CTL(PIPE_C))
648 calc_index(offset, _FDI_TXA_CTL, _FDI_TXB_CTL, 0, FDI_TX_CTL(PIPE_C))
651 calc_index(offset, _FDI_RXA_IMR, _FDI_RXB_IMR, 0, FDI_RX_IMR(PIPE_C))
759 calc_index(offset, _DSPASURF, _DSPBSURF, 0, DSPSURF(PIPE_C))
782 calc_index(offset, _SPRA_SURF, _SPRB_SURF, 0, SPRSURF(PIPE_C))
1984 MMIO_D(PIPEDSL(PIPE_C), D_ALL);
1989 MMIO_DH(PIPECONF(PIPE_C), D_ALL, NULL, pipeconf_mmio_write);
1994 MMIO_D(PIPESTAT(PIPE_C), D_ALL);
1999 MMIO_D(PIPE_FLIPCOUNT_G4X(PIPE_C), D_ALL);
2004 MMIO_D(PIPE_FRMCOUNT_G4X(PIPE_C), D_ALL)
    [all...]
reg.h 78 (((p) == PIPE_C) ? (((q) == PLANE_PRIMARY) ? (_MMIO(0x5008C)) : \
86 (((reg) == 0x5008C || (reg) == 0x5009C) ? (PIPE_C) : \
display.c 57 pipe = PIPE_C;
402 [PIPE_C] = PIPE_C_VBLANK,
406 if (pipe < PIPE_A || pipe > PIPE_C)
interrupt.c 456 DEFINE_GVT_GEN8_INTEL_GVT_IRQ_INFO(de_pipe_c, GEN8_DE_PIPE_ISR(PIPE_C));
cmd_parser.c 1227 [4] = {PIPE_C, PLANE_A, PRIMARY_C_FLIP_DONE},
1228 [5] = {PIPE_C, PLANE_B, SPRITE_C_FLIP_DONE},
1286 info->pipe = PIPE_C;
1301 info->pipe = PIPE_C;
  /src/sys/external/bsd/drm2/dist/drm/i915/
i915_pci.c 116 [PIPE_C] = CHV_CURSOR_C_OFFSET, \
123 [PIPE_C] = IVB_CURSOR_C_OFFSET, \
130 [PIPE_C] = IVB_CURSOR_C_OFFSET, \
436 .pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C), \
587 .pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C),
660 .pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C), \
826 .pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C) | BIT(PIPE_D),
intel_device_info.c 932 runtime->num_scalers[PIPE_C] = 1;
955 runtime->num_sprites[PIPE_C] = 1;
986 info->pipe_mask &= ~BIT(PIPE_C);
997 enabled_mask &= ~BIT(PIPE_C);
intel_pm.c 496 case PIPE_C:
1034 FW_WM_VLV(wm->pipe[PIPE_C].plane[PLANE_SPRITE1], SPRITEF) |
1035 FW_WM_VLV(wm->pipe[PIPE_C].plane[PLANE_SPRITE0], SPRITEE));
1037 FW_WM_VLV(wm->pipe[PIPE_C].plane[PLANE_PRIMARY], PLANEC) |
1038 FW_WM(wm->pipe[PIPE_C].plane[PLANE_CURSOR], CURSORC));
1041 FW_WM(wm->pipe[PIPE_C].plane[PLANE_SPRITE1] >> 8, SPRITEF_HI) |
1042 FW_WM(wm->pipe[PIPE_C].plane[PLANE_SPRITE0] >> 8, SPRITEE_HI) |
1043 FW_WM(wm->pipe[PIPE_C].plane[PLANE_PRIMARY] >> 8, PLANEC_HI) |
1930 wm_state->cxsr = crtc->pipe != PIPE_C && num_active_planes == 1;
2041 case PIPE_C
    [all...]
i915_irq.c 1335 case PIPE_C:
  /src/sys/external/bsd/drm2/dist/drm/i915/display/
intel_pipe_crc.c 190 case PIPE_C:
254 case PIPE_C:
intel_display.h 109 PIPE_C,
128 TRANSCODER_C = PIPE_C,
intel_display_power.c 43 return "PIPE_C";
1504 pipe = PIPE_C;
1565 assert_pll_disabled(dev_priv, PIPE_C);
1585 enum pipe pipe = phy == DPIO_PHY0 ? PIPE_A : PIPE_C;
2861 .hsw.irq_pipe_mask = BIT(PIPE_B) | BIT(PIPE_C),
3062 .hsw.irq_pipe_mask = BIT(PIPE_B) | BIT(PIPE_C),
3144 .hsw.irq_pipe_mask = BIT(PIPE_B) | BIT(PIPE_C),
3204 .hsw.irq_pipe_mask = BIT(PIPE_B) | BIT(PIPE_C),
3373 .hsw.irq_pipe_mask = BIT(PIPE_B) | BIT(PIPE_C),
3694 .hsw.irq_pipe_mask = BIT(PIPE_C),
    [all...]
intel_sprite.c 2871 if (IS_GEN(dev_priv, 9) && !IS_GEMINILAKE(dev_priv) && pipe == PIPE_C)
2940 return pipe != PIPE_C;
2942 return pipe != PIPE_C &&
icl_dsi.c 770 case PIPE_C:
1460 *pipe = PIPE_C;
intel_display_types.h 1418 case PIPE_C:
vlv_dsi.c 1015 if (WARN_ON(tmp > PIPE_C))
intel_ddi.c 1882 case PIPE_C:
2110 *pipe_mask = BIT(PIPE_C);
intel_display.c 5679 WARN_ON(I915_READ(FDI_RX_CTL(PIPE_C)) & FDI_RX_ENABLE);
5705 case PIPE_C:
7675 other_crtc = intel_get_crtc_for_pipe(dev_priv, PIPE_C);
7687 case PIPE_C:
8655 (pipe == PIPE_B || pipe == PIPE_C))
10765 trans_pipe = PIPE_C;
11524 if (IS_CHERRYVIEW(dev_priv) && pipe == PIPE_C &&
intel_hdmi.c 3301 intel_encoder->pipe_mask = BIT(PIPE_C);
intel_dp.c 7659 intel_encoder->pipe_mask = BIT(PIPE_C);

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