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    Searched refs:PLL0 (Results 1 - 5 of 5) sorted by relevancy

  /src/sys/external/gpl2/dts/dist/include/dt-bindings/clock/
qcom,gcc-ipq806x.h 231 #define PLL0 220
qcom,gcc-mdm9615.h 288 #define PLL0 276
qcom,gcc-msm8660.h 258 #define PLL0 247
qcom,gcc-msm8960.h 286 #define PLL0 276
  /src/sys/external/gpl2/dts/dist/arch/mips/boot/dts/ingenic/
gcw0.dts 446 * PLL0 frequency on demand without having to suspend peripherals.
449 * Put the GPU under PLL0 since we want a higher frequency.

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