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    Searched refs:PRESCALE_GRPH_CONTROL (Results 1 - 6 of 6) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/
dce_mem_input.h 46 SRI(PRESCALE_GRPH_CONTROL, DCP, id),\
97 uint32_t PRESCALE_GRPH_CONTROL;
155 SFB(blk, PRESCALE_GRPH_CONTROL, GRPH_PRESCALE_SELECT, mask_sh),\
156 SFB(blk, PRESCALE_GRPH_CONTROL, GRPH_PRESCALE_R_SIGN, mask_sh),\
157 SFB(blk, PRESCALE_GRPH_CONTROL, GRPH_PRESCALE_G_SIGN, mask_sh),\
158 SFB(blk, PRESCALE_GRPH_CONTROL, GRPH_PRESCALE_B_SIGN, mask_sh),\
amdgpu_dce_ipp.c 151 REG_UPDATE(PRESCALE_GRPH_CONTROL,
167 REG_UPDATE(PRESCALE_GRPH_CONTROL,
220 REG_UPDATE(PRESCALE_GRPH_CONTROL, GRPH_PRESCALE_BYPASS, 1);
dce_ipp.h 46 SRI(PRESCALE_GRPH_CONTROL, DCP, id), \
89 IPP_SF(PRESCALE_GRPH_CONTROL, GRPH_PRESCALE_BYPASS, mask_sh), \
210 uint32_t PRESCALE_GRPH_CONTROL;
amdgpu_dce_mem_input.c 502 REG_UPDATE_4(PRESCALE_GRPH_CONTROL,
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_dce_v10_0.c 2132 tmp = REG_SET_FIELD(tmp, PRESCALE_GRPH_CONTROL, GRPH_PRESCALE_BYPASS, 1);
amdgpu_dce_v11_0.c 2173 tmp = REG_SET_FIELD(tmp, PRESCALE_GRPH_CONTROL, GRPH_PRESCALE_BYPASS, 1);

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