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  /src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/
armada-xp-mv78460.dtsi 82 <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000 /* Port 0.0 registers */
83 0x82000000 0 0x42000 MBUS_ID(0xf0, 0x01) 0x42000 0 0x00002000 /* Port 2.0 registers */
84 0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000 /* Port 0.1 registers */
85 0x82000000 0 0x48000 MBUS_ID(0xf0, 0x01) 0x48000 0 0x00002000 /* Port 0.2 registers */
86 0x82000000 0 0x4c000 MBUS_ID(0xf0, 0x01) 0x4c000 0 0x00002000 /* Port 0.3 registers */
87 0x82000000 0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x00002000 /* Port 1.0 registers */
88 0x82000000 0 0x82000 MBUS_ID(0xf0, 0x01) 0x82000 0 0x00002000 /* Port 3.0 registers */
89 0x82000000 0 0x84000 MBUS_ID(0xf0, 0x01) 0x84000 0 0x00002000 /* Port 1.1 registers */
90 0x82000000 0 0x88000 MBUS_ID(0xf0, 0x01) 0x88000 0 0x00002000 /* Port 1.2 registers */
91 0x82000000 0 0x8c000 MBUS_ID(0xf0, 0x01) 0x8c000 0 0x00002000 /* Port 1.3 registers *
    [all...]
armada-xp-mv78260.dtsi 65 <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000 /* Port 0.0 registers */
66 0x82000000 0 0x42000 MBUS_ID(0xf0, 0x01) 0x42000 0 0x00002000 /* Port 2.0 registers */
67 0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000 /* Port 0.1 registers */
68 0x82000000 0 0x48000 MBUS_ID(0xf0, 0x01) 0x48000 0 0x00002000 /* Port 0.2 registers */
69 0x82000000 0 0x4c000 MBUS_ID(0xf0, 0x01) 0x4c000 0 0x00002000 /* Port 0.3 registers */
70 0x82000000 0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x00002000 /* Port 1.0 registers */
71 0x82000000 0 0x84000 MBUS_ID(0xf0, 0x01) 0x84000 0 0x00002000 /* Port 1.1 registers */
72 0x82000000 0 0x88000 MBUS_ID(0xf0, 0x01) 0x88000 0 0x00002000 /* Port 1.2 registers */
73 0x82000000 0 0x8c000 MBUS_ID(0xf0, 0x01) 0x8c000 0 0x00002000 /* Port 1.3 registers */
74 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM *
    [all...]
omap3-beagle-xm-ab.dts 9 /* HS USB Port 2 Power enable was inverted with the xM C */
armada-xp-mv78230.dtsi 64 <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000 /* Port 0.0 registers */
65 0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000 /* Port 0.1 registers */
66 0x82000000 0 0x48000 MBUS_ID(0xf0, 0x01) 0x48000 0 0x00002000 /* Port 0.2 registers */
67 0x82000000 0 0x4c000 MBUS_ID(0xf0, 0x01) 0x4c000 0 0x00002000 /* Port 0.3 registers */
68 0x82000000 0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x00002000 /* Port 1.0 registers */
69 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */
70 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */
71 0x82000000 0x2 0 MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 0.1 MEM */
72 0x81000000 0x2 0 MBUS_ID(0x04, 0xd0) 0 1 0 /* Port 0.1 IO */
73 0x82000000 0x3 0 MBUS_ID(0x04, 0xb8) 0 1 0 /* Port 0.2 MEM *
    [all...]
armada-385.dtsi 52 0x82000000 0x1 0 MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 0 MEM */
53 0x81000000 0x1 0 MBUS_ID(0x08, 0xe0) 0 1 0 /* Port 0 IO */
54 0x82000000 0x2 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 1 MEM */
55 0x81000000 0x2 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 1 IO */
56 0x82000000 0x3 0 MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 2 MEM */
57 0x81000000 0x3 0 MBUS_ID(0x04, 0xd0) 0 1 0 /* Port 2 IO */
58 0x82000000 0x4 0 MBUS_ID(0x04, 0xb8) 0 1 0 /* Port 3 MEM */
59 0x81000000 0x4 0 MBUS_ID(0x04, 0xb0) 0 1 0 /* Port 3 IO */>;
62 * This port can be either x4 or x1. When
78 marvell,pcie-port = <0>
    [all...]
kirkwood-98dx4122.dtsi 16 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */
17 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */>;
31 marvell,pcie-port = <0>;
armada-xp-db.dts 192 /* Port 0, Lane 0 */
196 /* Port 0, Lane 1 */
200 /* Port 0, Lane 2 */
204 /* Port 0, Lane 3 */
208 /* Port 2, Lane 0 */
212 /* Port 3, Lane 0 */
armada-xp-axpwifiap.dts 100 /* First mini-PCIe port */
102 /* Port 0, Lane 0 */
106 /* Second mini-PCIe port */
108 /* Port 0, Lane 1 */
114 /* Port 0, Lane 3 */
kirkwood-6282.dtsi 18 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */
19 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */
20 0x82000000 0x2 0 MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 1.0 MEM */
21 0x81000000 0x2 0 MBUS_ID(0x04, 0xd0) 0 1 0 /* Port 1.0 IO */>;
35 marvell,pcie-port = <0>;
53 marvell,pcie-port = <1>;
kirkwood-6192.dtsi 16 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */
17 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */>;
31 marvell,pcie-port = <0>;
kirkwood-6281.dtsi 16 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */
17 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */>;
31 marvell,pcie-port = <0>;
armada-385-db-ap.dts 156 /* Port 0, Lane 0 */
161 /* Port 1, Lane 0 */
166 /* Port 2, Lane 0 */
aspeed-bmc-facebook-minipack.dts 128 * to PIM (Port Interface Module) #1 (1-based).
141 * to PIM (Port Interface Module) #2 (1-based).
154 * to PIM (Port Interface Module) #3 (1-based).
167 * to PIM (Port Interface Module) #4 (1-based).
180 * to PIM (Port Interface Module) #5 (1-based).
193 * to PIM (Port Interface Module) #6 (1-based).
206 * to PIM (Port Interface Module) #7 (1-based).
219 * to PIM (Port Interface Module) #8 (1-based).
805 * (Port Interface Module) #1 (1-based).
871 * (Port Interface Module) #2 (1-based)
    [all...]
armada-370-mirabox.dts 120 /* Port 0, Lane 0 */
126 /* Port 1, Lane 0 */
armada-375-db.dts 46 /* Port 0, Lane 0 */
51 /* Port 1, Lane 0 */
armada-388-db.dts 122 /* Port 0, Lane 0 */
126 /* Port 1, Lane 0 */
armada-39x.dtsi 421 0x82000000 0x1 0 MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 0 MEM */
422 0x81000000 0x1 0 MBUS_ID(0x08, 0xe0) 0 1 0 /* Port 0 IO */
423 0x82000000 0x2 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 1 MEM */
424 0x81000000 0x2 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 1 IO */
425 0x82000000 0x3 0 MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 2 MEM */
426 0x81000000 0x3 0 MBUS_ID(0x04, 0xd0) 0 1 0 /* Port 2 IO */
427 0x82000000 0x4 0 MBUS_ID(0x04, 0xb8) 0 1 0 /* Port 3 MEM */
428 0x81000000 0x4 0 MBUS_ID(0x04, 0xb0) 0 1 0 /* Port 3 IO */>;
431 * This port can be either x4 or x1. When
447 marvell,pcie-port = <0>
    [all...]
armada-370-dlink-dns327l.dts 118 regulator-name = "USB3.0 Port Power";
163 /* Port 0, Lane 0 */
168 /* Port 1, Lane 0 */
armada-xp-gp.dts 189 /* Port 0, Lane 0 */
193 /* Port 2, Lane 0 */
197 /* Port 3, Lane 0 */
  /src/sys/external/bsd/gnu-efi/dist/lib/
hw.c 77 IN UINTN Port
83 Status = uefi_call_wrapper(GlobalIoFncs->Io.Read, 5, GlobalIoFncs, Width, (UINT64)Port, 1, &Data);
92 IN UINTN Port,
98 Status = uefi_call_wrapper(GlobalIoFncs->Io.Write, 5, GlobalIoFncs, Width, (UINT64)Port, 1, &Data);
  /src/sys/external/gpl2/dts/dist/arch/mips/boot/dts/cavium-octeon/
octeon_3xxx.dts 207 compatible = "cavium,octeon-3860-pip-port";
208 reg = <0x3>; /* Port */
214 compatible = "cavium,octeon-3860-pip-port";
215 reg = <0x4>; /* Port */
219 compatible = "cavium,octeon-3860-pip-port";
220 reg = <0x5>; /* Port */
224 compatible = "cavium,octeon-3860-pip-port";
225 reg = <0x6>; /* Port */
229 compatible = "cavium,octeon-3860-pip-port";
230 reg = <0x7>; /* Port */
    [all...]
octeon_68xx.dts 268 compatible = "cavium,octeon-3860-pip-port";
269 reg = <0x0>; /* Port */
274 compatible = "cavium,octeon-3860-pip-port";
275 reg = <0x1>; /* Port */
280 compatible = "cavium,octeon-3860-pip-port";
281 reg = <0x2>; /* Port */
286 compatible = "cavium,octeon-3860-pip-port";
287 reg = <0x3>; /* Port */
300 compatible = "cavium,octeon-3860-pip-port";
301 reg = <0x0>; /* Port */
    [all...]
octeon_3xxx.dtsi 70 compatible = "cavium,octeon-3860-pip-port";
71 reg = <0x0>; /* Port */
75 compatible = "cavium,octeon-3860-pip-port";
76 reg = <0x1>; /* Port */
80 compatible = "cavium,octeon-3860-pip-port";
81 reg = <0x2>; /* Port */
  /src/sys/external/bsd/compiler_rt/dist/lib/fuzzer/
FuzzerUtilFuchsia.cpp 33 #include <zircon/syscalls/port.h>
52 // A magic value for the Zircon exception port, chosen to spell 'FUZZING'
221 // Create and bind the exception port. We need to claim to be a "debugger" so
223 // Once the port is set, we can signal the main thread to continue and wait
225 ScopedHandle Port;
226 ExitOnErr(_zx_port_create(0, &Port.Handle), "_zx_port_create");
229 ExitOnErr(_zx_task_bind_exception_port(Self, Port.Handle, kFuzzingCrash,
237 ExitOnErr(_zx_port_wait(Port.Handle, ZX_TIME_INFINITE, &Packet),
285 ExitOnErr(_zx_task_resume_from_exception(Thread.Handle, Port.Handle, 0),
  /src/sys/external/gpl2/dts/dist/arch/riscv/boot/dts/allwinner/
sun20i-d1-nezha.dts 198 /* Port A */
203 /* Port B */
220 /* Port C */
227 /* Port D */

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