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Searched refs:SMC_CG_IND_START (Results 1 - 6 of 6) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/radeon/
sid.h	`62 /* CG IND registers are accessed via SMC indirect space + SMC_CG_IND_START */ 63 #define SMC_CG_IND_START 0xc0030000`
radeon_si.c	`5473 WREG32_SMC(SMC_CG_IND_START + CG_CGTT_LOCAL_0, 0); 5474 WREG32_SMC(SMC_CG_IND_START + CG_CGTT_LOCAL_1, 0); 5485 WREG32_SMC(SMC_CG_IND_START + CG_CGTT_LOCAL_0, 0xffffffff); 5486 WREG32_SMC(SMC_CG_IND_START + CG_CGTT_LOCAL_1, 0xffffffff);`
radeon_si_dpm.c	`2754 offset = SMC_CG_IND_START + config_regs->offset; 2768 offset = SMC_CG_IND_START + config_regs->offset;`
/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
sid.h	`64 /* CG IND registers are accessed via SMC indirect space + SMC_CG_IND_START */ 65 #define SMC_CG_IND_START 0xc0030000`
amdgpu_si_dpm.c	`2854 offset = SMC_CG_IND_START + config_regs->offset; 2868 offset = SMC_CG_IND_START + config_regs->offset;`
/src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/
amdgpu_smu7_hwmgr.c	`73 #define SMC_CG_IND_START 0xc0030000`

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