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Searched refs:SMC_SISLANDS_SPLL_DIV_TABLE_FBDIV_MASK (Results 1 - 4 of 4) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
sislands_smc.h	`356 #define SMC_SISLANDS_SPLL_DIV_TABLE_FBDIV_MASK 0x01ffffff`
amdgpu_si_dpm.c	`2986 if (fb_div & ~(SMC_SISLANDS_SPLL_DIV_TABLE_FBDIV_MASK >> SMC_SISLANDS_SPLL_DIV_TABLE_FBDIV_SHIFT)) 2996 tmp = ((fb_div << SMC_SISLANDS_SPLL_DIV_TABLE_FBDIV_SHIFT) & SMC_SISLANDS_SPLL_DIV_TABLE_FBDIV_MASK) \|`
/src/sys/external/bsd/drm2/dist/drm/radeon/
sislands_smc.h	`356 #define SMC_SISLANDS_SPLL_DIV_TABLE_FBDIV_MASK 0x01ffffff`
radeon_si_dpm.c	`2887 if (fb_div & ~(SMC_SISLANDS_SPLL_DIV_TABLE_FBDIV_MASK >> SMC_SISLANDS_SPLL_DIV_TABLE_FBDIV_SHIFT)) 2897 tmp = ((fb_div << SMC_SISLANDS_SPLL_DIV_TABLE_FBDIV_SHIFT) & SMC_SISLANDS_SPLL_DIV_TABLE_FBDIV_MASK) \|`

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