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Searched refs:TEGRA124_CLK_PLL_A_OUT0 (Results 1 - 6 of 6) sorted by relevancy

/src/sys/external/gpl2/dts/dist/include/dt-bindings/clock/
tegra124-car-common.h	`247 #define TEGRA124_CLK_PLL_A_OUT0 217`
/src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/
tegra124-nyan.dtsi	`767 <&tegra_car TEGRA124_CLK_PLL_A_OUT0>, 774 assigned-clock-parents = <&tegra_car TEGRA124_CLK_PLL_A_OUT0>,`
tegra124-venice2.dts	`1242 <&tegra_car TEGRA124_CLK_PLL_A_OUT0>, 1249 assigned-clock-parents = <&tegra_car TEGRA124_CLK_PLL_A_OUT0>,`
tegra124-apalis-v1.2.dtsi	`2012 <&tegra_car TEGRA124_CLK_PLL_A_OUT0>, 2019 assigned-clock-parents = <&tegra_car TEGRA124_CLK_PLL_A_OUT0>,`
tegra124-apalis.dtsi	`2004 <&tegra_car TEGRA124_CLK_PLL_A_OUT0>, 2011 assigned-clock-parents = <&tegra_car TEGRA124_CLK_PLL_A_OUT0>,`
tegra124-jetson-tk1.dts	`2035 <&tegra_car TEGRA124_CLK_PLL_A_OUT0>, 2042 assigned-clock-parents = <&tegra_car TEGRA124_CLK_PLL_A_OUT0>,`

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