HomeSort by: relevance | last modified time | path
    Searched refs:UVD_CGC_CTRL__CLK_GATE_DLY_TIMER__SHIFT (Results 1 - 12 of 12) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_vcn_v1_0.c 471 data |= 1 << UVD_CGC_CTRL__CLK_GATE_DLY_TIMER__SHIFT;
595 data |= 1 << UVD_CGC_CTRL__CLK_GATE_DLY_TIMER__SHIFT;
656 reg_data |= 1 << UVD_CGC_CTRL__CLK_GATE_DLY_TIMER__SHIFT;
amdgpu_vcn_v2_0.c 464 data |= 1 << UVD_CGC_CTRL__CLK_GATE_DLY_TIMER__SHIFT;
566 reg_data |= 1 << UVD_CGC_CTRL__CLK_GATE_DLY_TIMER__SHIFT;
622 data |= 1 << UVD_CGC_CTRL__CLK_GATE_DLY_TIMER__SHIFT;
amdgpu_vcn_v2_5.c 551 data |= 1 << UVD_CGC_CTRL__CLK_GATE_DLY_TIMER__SHIFT;
657 reg_data |= 1 << UVD_CGC_CTRL__CLK_GATE_DLY_TIMER__SHIFT;
716 data |= 1 << UVD_CGC_CTRL__CLK_GATE_DLY_TIMER__SHIFT;
amdgpu_uvd_v4_2.c 617 (1 << UVD_CGC_CTRL__CLK_GATE_DLY_TIMER__SHIFT) |
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/uvd/
uvd_4_0_sh_mask.h 35 #define UVD_CGC_CTRL__CLK_GATE_DLY_TIMER__SHIFT 0x00000002
uvd_4_2_sh_mask.h 226 #define UVD_CGC_CTRL__CLK_GATE_DLY_TIMER__SHIFT 0x2
uvd_5_0_sh_mask.h 248 #define UVD_CGC_CTRL__CLK_GATE_DLY_TIMER__SHIFT 0x2
uvd_6_0_sh_mask.h 250 #define UVD_CGC_CTRL__CLK_GATE_DLY_TIMER__SHIFT 0x2
uvd_7_0_sh_mask.h 421 #define UVD_CGC_CTRL__CLK_GATE_DLY_TIMER__SHIFT 0x2
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/
vcn_1_0_sh_mask.h 914 #define UVD_CGC_CTRL__CLK_GATE_DLY_TIMER__SHIFT 0x2
vcn_2_0_0_sh_mask.h 1932 #define UVD_CGC_CTRL__CLK_GATE_DLY_TIMER__SHIFT 0x2
vcn_2_5_sh_mask.h 1982 #define UVD_CGC_CTRL__CLK_GATE_DLY_TIMER__SHIFT 0x2

Completed in 74 milliseconds