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    Searched refs:UVD_DPG_PAUSE__NJ_PAUSE_DPG_REQ_MASK (Results 1 - 6 of 6) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_vcn_v1_0.c 1236 reg_data |= UVD_DPG_PAUSE__NJ_PAUSE_DPG_REQ_MASK;
1266 reg_data &= ~UVD_DPG_PAUSE__NJ_PAUSE_DPG_REQ_MASK;
amdgpu_vcn_v2_0.c 1160 reg_data |= UVD_DPG_PAUSE__NJ_PAUSE_DPG_REQ_MASK;
1192 reg_data &= ~UVD_DPG_PAUSE__NJ_PAUSE_DPG_REQ_MASK;
amdgpu_vcn_v2_5.c 1390 reg_data |= UVD_DPG_PAUSE__NJ_PAUSE_DPG_REQ_MASK;
1421 reg_data &= ~UVD_DPG_PAUSE__NJ_PAUSE_DPG_REQ_MASK;
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/
vcn_1_0_sh_mask.h 110 #define UVD_DPG_PAUSE__NJ_PAUSE_DPG_REQ_MASK 0x00000004L
vcn_2_0_0_sh_mask.h 1572 #define UVD_DPG_PAUSE__NJ_PAUSE_DPG_REQ_MASK 0x00000004L
vcn_2_5_sh_mask.h 1575 #define UVD_DPG_PAUSE__NJ_PAUSE_DPG_REQ_MASK 0x00000004L

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