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Searched refs:UVD_LMI_CTRL__WRITE_CLEAN_TIMER__SHIFT (Results 1 - 13 of 13) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_uvd_v7_0.c	`876 (uint32_t)((0x40 << UVD_LMI_CTRL__WRITE_CLEAN_TIMER__SHIFT) \| 991 (0x40 << UVD_LMI_CTRL__WRITE_CLEAN_TIMER__SHIFT) \|`
amdgpu_vcn_v1_0.c	`991 (8 << UVD_LMI_CTRL__WRITE_CLEAN_TIMER__SHIFT) \| 1046 (8 << UVD_LMI_CTRL__WRITE_CLEAN_TIMER__SHIFT) \|`
amdgpu_uvd_v6_0.c	`746 (0x40 << UVD_LMI_CTRL__WRITE_CLEAN_TIMER__SHIFT) \|`
amdgpu_vcn_v2_0.c	`787 (8 << UVD_LMI_CTRL__WRITE_CLEAN_TIMER__SHIFT) \|`
amdgpu_vcn_v2_5.c	`795 (8 << UVD_LMI_CTRL__WRITE_CLEAN_TIMER__SHIFT) \|`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/uvd/
uvd_4_0_sh_mask.h	`353 #define UVD_LMI_CTRL__WRITE_CLEAN_TIMER__SHIFT 0x00000000`
uvd_4_2_sh_mask.h	`352 #define UVD_LMI_CTRL__WRITE_CLEAN_TIMER__SHIFT 0x0`
uvd_5_0_sh_mask.h	`384 #define UVD_LMI_CTRL__WRITE_CLEAN_TIMER__SHIFT 0x0`
uvd_6_0_sh_mask.h	`386 #define UVD_LMI_CTRL__WRITE_CLEAN_TIMER__SHIFT 0x0`
uvd_7_0_sh_mask.h	`507 #define UVD_LMI_CTRL__WRITE_CLEAN_TIMER__SHIFT 0x0`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/
vcn_1_0_sh_mask.h	`1029 #define UVD_LMI_CTRL__WRITE_CLEAN_TIMER__SHIFT 0x0`
vcn_2_0_0_sh_mask.h	`2398 #define UVD_LMI_CTRL__WRITE_CLEAN_TIMER__SHIFT 0x0`
vcn_2_5_sh_mask.h	`3349 #define UVD_LMI_CTRL__WRITE_CLEAN_TIMER__SHIFT 0x0`

Completed in 74 milliseconds