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    Searched refs:UVD_PGFSM_CONFIG__UVDC_PWR_CONFIG__SHIFT (Results 1 - 5 of 5) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_vcn_v1_0.c 699 | 2 << UVD_PGFSM_CONFIG__UVDC_PWR_CONFIG__SHIFT
714 | 1 << UVD_PGFSM_CONFIG__UVDC_PWR_CONFIG__SHIFT
752 | 2 << UVD_PGFSM_CONFIG__UVDC_PWR_CONFIG__SHIFT
amdgpu_vcn_v2_0.c 672 | 2 << UVD_PGFSM_CONFIG__UVDC_PWR_CONFIG__SHIFT
687 | 1 << UVD_PGFSM_CONFIG__UVDC_PWR_CONFIG__SHIFT
726 | 2 << UVD_PGFSM_CONFIG__UVDC_PWR_CONFIG__SHIFT
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/
vcn_1_0_sh_mask.h 32 #define UVD_PGFSM_CONFIG__UVDC_PWR_CONFIG__SHIFT 0x6
vcn_2_0_0_sh_mask.h 1465 #define UVD_PGFSM_CONFIG__UVDC_PWR_CONFIG__SHIFT 0x6
vcn_2_5_sh_mask.h 1468 #define UVD_PGFSM_CONFIG__UVDC_PWR_CONFIG__SHIFT 0x6

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