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Searched refs:UVD_PGFSM_CONFIG__UVDM_PWR_CONFIG__SHIFT (Results 1 - 5 of 5) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_vcn_v1_0.c	`696 data = (1 << UVD_PGFSM_CONFIG__UVDM_PWR_CONFIG__SHIFT 711 data = (1 << UVD_PGFSM_CONFIG__UVDM_PWR_CONFIG__SHIFT 749 data = (2 << UVD_PGFSM_CONFIG__UVDM_PWR_CONFIG__SHIFT`
amdgpu_vcn_v2_0.c	`669 data = (1 << UVD_PGFSM_CONFIG__UVDM_PWR_CONFIG__SHIFT 684 data = (1 << UVD_PGFSM_CONFIG__UVDM_PWR_CONFIG__SHIFT 723 data = (2 << UVD_PGFSM_CONFIG__UVDM_PWR_CONFIG__SHIFT`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/
vcn_1_0_sh_mask.h	`29 #define UVD_PGFSM_CONFIG__UVDM_PWR_CONFIG__SHIFT 0x0`
vcn_2_0_0_sh_mask.h	`1462 #define UVD_PGFSM_CONFIG__UVDM_PWR_CONFIG__SHIFT 0x0`
vcn_2_5_sh_mask.h	`1465 #define UVD_PGFSM_CONFIG__UVDM_PWR_CONFIG__SHIFT 0x0`

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