HomeSort by: relevance | last modified time | path
    Searched refs:UVD_PGFSM_CONFIG__UVDW_PWR_CONFIG__SHIFT (Results 1 - 4 of 4) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_vcn_v1_0.c 706 | 2 << UVD_PGFSM_CONFIG__UVDW_PWR_CONFIG__SHIFT);
721 | 1 << UVD_PGFSM_CONFIG__UVDW_PWR_CONFIG__SHIFT);
759 | 2 << UVD_PGFSM_CONFIG__UVDW_PWR_CONFIG__SHIFT);
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/
vcn_1_0_sh_mask.h 39 #define UVD_PGFSM_CONFIG__UVDW_PWR_CONFIG__SHIFT 0x14
vcn_2_0_0_sh_mask.h 1472 #define UVD_PGFSM_CONFIG__UVDW_PWR_CONFIG__SHIFT 0x14
vcn_2_5_sh_mask.h 1475 #define UVD_PGFSM_CONFIG__UVDW_PWR_CONFIG__SHIFT 0x14

Completed in 139 milliseconds