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    Searched refs:UVD_SUVD_CGC_GATE__IME_HEVC_MASK (Results 1 - 6 of 6) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/
vcn_1_0_sh_mask.h 480 #define UVD_SUVD_CGC_GATE__IME_HEVC_MASK 0x01000000L
vcn_2_0_0_sh_mask.h 3235 #define UVD_SUVD_CGC_GATE__IME_HEVC_MASK 0x01000000L
vcn_2_5_sh_mask.h 2109 #define UVD_SUVD_CGC_GATE__IME_HEVC_MASK 0x01000000L
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_vcn_v1_0.c 546 | UVD_SUVD_CGC_GATE__IME_HEVC_MASK);
amdgpu_vcn_v2_0.c 539 | UVD_SUVD_CGC_GATE__IME_HEVC_MASK);
amdgpu_vcn_v2_5.c 629 | UVD_SUVD_CGC_GATE__IME_HEVC_MASK);

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