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    Searched refs:VR4181AIU_ADENAIU (Results 1 - 2 of 2) sorted by relevancy

/src/sys/arch/hpcmips/vr/
vr4181aiureg.h	63 #define VR4181AIU_ADENAIU 0x8000 /* A/D enable */
vr4181aiu.c	299 VR4181AIU_MCNT_REG_W, VR4181AIU_ADENAIU);

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