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    Searched refs:WDCTL_RST (Results 1 - 9 of 9) sorted by relevancy

  /src/sys/dev/ic/
wdcreg.h 68 #define WDCTL_RST 0x04 /* reset the controller */
ahcisata_core.c 898 cmd_tbl->cmdt_cfis[rhd_control] = WDCTL_RST | WDCTL_4BIT;
913 aprint_error("%s port %d: setting WDCTL_RST failed "
929 * Try to clear WDCTL_RST a few times before giving up.
953 aprint_error("%s port %d: clearing WDCTL_RST failed "
wdc.c 1081 WDCTL_RST | WDCTL_IDS | WDCTL_4BIT);
mvsata.c 3357 MVSATA_WDC_WRITE_1(mvport, SRB_CAS, WDCTL_RST | WDCTL_IDS | WDCTL_4BIT);
  /src/sys/arch/dreamcast/dev/g1/
wdc_g1.c 169 * and it doesn't reset itself by the WDCTL_RST in AUX_CTLR but requires
188 WDCTL_RST | WDCTL_4BIT | WDCTL_IDS);
  /src/sys/arch/mips/adm5120/dev/
wdc_extio.c 128 bus_space_write_1(wdr->ctl_iot, wdr->ctl_ioh, wd_aux_ctlr, WDCTL_RST);
  /src/sys/arch/cobalt/stand/boot/
wdc.c 139 WDC_WRITE_CTLREG(chp, wd_aux_ctlr, WDCTL_RST | WDCTL_IDS);
  /src/sys/arch/mmeye/stand/boot/
wdc.c 148 WDC_WRITE_CTLREG(chp, wd_aux_ctlr, WDCTL_RST | WDCTL_IDS);
  /src/sys/arch/bebox/stand/boot/
wdc.c 182 WDC_WRITE_CTLREG(chp, wd_aux_ctlr, WDCTL_RST | WDCTL_IDS);

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