| /src/sys/external/bsd/drm2/dist/drm/i915/oa/ |
| i915_oa_tgl.c | 20 { _MMIO(0xD920), 0x00000000 },
21 { _MMIO(0xD900), 0x00000000 },
22 { _MMIO(0xD904), 0xF0800000 },
23 { _MMIO(0xD910), 0x00000000 },
24 { _MMIO(0xD914), 0xF0800000 },
25 { _MMIO(0xDC40), 0x00FF0000 },
26 { _MMIO(0xD940), 0x00000004 },
27 { _MMIO(0xD944), 0x0000FFFF },
28 { _MMIO(0xDC00), 0x00000004 },
29 { _MMIO(0xDC04), 0x0000FFFF }
[all...] |
| i915_oa_hsw.c | 20 { _MMIO(0x2724), 0x00800000 },
21 { _MMIO(0x2720), 0x00000000 },
22 { _MMIO(0x2714), 0x00800000 },
23 { _MMIO(0x2710), 0x00000000 },
30 { _MMIO(0x9840), 0x00000080 },
31 { _MMIO(0x253a4), 0x01600000 },
32 { _MMIO(0x25440), 0x00100000 },
33 { _MMIO(0x25128), 0x00000000 },
34 { _MMIO(0x2691c), 0x00000800 },
35 { _MMIO(0x26aa0), 0x01500000 }
[all...] |
| i915_oa_bdw.c | 20 { _MMIO(0x2740), 0x00000000 },
21 { _MMIO(0x2744), 0x00800000 },
22 { _MMIO(0x2714), 0xf0800000 },
23 { _MMIO(0x2710), 0x00000000 },
24 { _MMIO(0x2724), 0xf0800000 },
25 { _MMIO(0x2720), 0x00000000 },
26 { _MMIO(0x2770), 0x00000004 },
27 { _MMIO(0x2774), 0x00000000 },
28 { _MMIO(0x2778), 0x00000003 },
29 { _MMIO(0x277c), 0x00000000 }
[all...] |
| i915_oa_cflgt2.c | 20 { _MMIO(0x2740), 0x00000000 },
21 { _MMIO(0x2744), 0x00800000 },
22 { _MMIO(0x2714), 0xf0800000 },
23 { _MMIO(0x2710), 0x00000000 },
24 { _MMIO(0x2724), 0xf0800000 },
25 { _MMIO(0x2720), 0x00000000 },
26 { _MMIO(0x2770), 0x00000004 },
27 { _MMIO(0x2774), 0x00000000 },
28 { _MMIO(0x2778), 0x00000003 },
29 { _MMIO(0x277c), 0x00000000 }
[all...] |
| i915_oa_cflgt3.c | 20 { _MMIO(0x2740), 0x00000000 },
21 { _MMIO(0x2744), 0x00800000 },
22 { _MMIO(0x2714), 0xf0800000 },
23 { _MMIO(0x2710), 0x00000000 },
24 { _MMIO(0x2724), 0xf0800000 },
25 { _MMIO(0x2720), 0x00000000 },
26 { _MMIO(0x2770), 0x00000004 },
27 { _MMIO(0x2774), 0x00000000 },
28 { _MMIO(0x2778), 0x00000003 },
29 { _MMIO(0x277c), 0x00000000 }
[all...] |
| i915_oa_chv.c | 20 { _MMIO(0x2740), 0x00000000 },
21 { _MMIO(0x2744), 0x00800000 },
22 { _MMIO(0x2714), 0xf0800000 },
23 { _MMIO(0x2710), 0x00000000 },
24 { _MMIO(0x2724), 0xf0800000 },
25 { _MMIO(0x2720), 0x00000000 },
26 { _MMIO(0x2770), 0x00000004 },
27 { _MMIO(0x2774), 0x00000000 },
28 { _MMIO(0x2778), 0x00000003 },
29 { _MMIO(0x277c), 0x00000000 }
[all...] |
| i915_oa_kblgt2.c | 20 { _MMIO(0x2740), 0x00000000 },
21 { _MMIO(0x2744), 0x00800000 },
22 { _MMIO(0x2714), 0xf0800000 },
23 { _MMIO(0x2710), 0x00000000 },
24 { _MMIO(0x2724), 0xf0800000 },
25 { _MMIO(0x2720), 0x00000000 },
26 { _MMIO(0x2770), 0x00000004 },
27 { _MMIO(0x2774), 0x00000000 },
28 { _MMIO(0x2778), 0x00000003 },
29 { _MMIO(0x277c), 0x00000000 }
[all...] |
| i915_oa_kblgt3.c | 20 { _MMIO(0x2740), 0x00000000 },
21 { _MMIO(0x2744), 0x00800000 },
22 { _MMIO(0x2714), 0xf0800000 },
23 { _MMIO(0x2710), 0x00000000 },
24 { _MMIO(0x2724), 0xf0800000 },
25 { _MMIO(0x2720), 0x00000000 },
26 { _MMIO(0x2770), 0x00000004 },
27 { _MMIO(0x2774), 0x00000000 },
28 { _MMIO(0x2778), 0x00000003 },
29 { _MMIO(0x277c), 0x00000000 }
[all...] |
| i915_oa_sklgt3.c | 20 { _MMIO(0x2740), 0x00000000 },
21 { _MMIO(0x2744), 0x00800000 },
22 { _MMIO(0x2714), 0xf0800000 },
23 { _MMIO(0x2710), 0x00000000 },
24 { _MMIO(0x2724), 0xf0800000 },
25 { _MMIO(0x2720), 0x00000000 },
26 { _MMIO(0x2770), 0x00000004 },
27 { _MMIO(0x2774), 0x00000000 },
28 { _MMIO(0x2778), 0x00000003 },
29 { _MMIO(0x277c), 0x00000000 }
[all...] |
| i915_oa_sklgt4.c | 20 { _MMIO(0x2740), 0x00000000 },
21 { _MMIO(0x2744), 0x00800000 },
22 { _MMIO(0x2714), 0xf0800000 },
23 { _MMIO(0x2710), 0x00000000 },
24 { _MMIO(0x2724), 0xf0800000 },
25 { _MMIO(0x2720), 0x00000000 },
26 { _MMIO(0x2770), 0x00000004 },
27 { _MMIO(0x2774), 0x00000000 },
28 { _MMIO(0x2778), 0x00000003 },
29 { _MMIO(0x277c), 0x00000000 }
[all...] |
| i915_oa_bxt.c | 20 { _MMIO(0x2740), 0x00000000 },
21 { _MMIO(0x2744), 0x00800000 },
22 { _MMIO(0x2714), 0xf0800000 },
23 { _MMIO(0x2710), 0x00000000 },
24 { _MMIO(0x2724), 0xf0800000 },
25 { _MMIO(0x2720), 0x00000000 },
26 { _MMIO(0x2770), 0x00000004 },
27 { _MMIO(0x2774), 0x00000000 },
28 { _MMIO(0x2778), 0x00000003 },
29 { _MMIO(0x277c), 0x00000000 }
[all...] |
| i915_oa_glk.c | 20 { _MMIO(0x2740), 0x00000000 },
21 { _MMIO(0x2744), 0x00800000 },
22 { _MMIO(0x2714), 0xf0800000 },
23 { _MMIO(0x2710), 0x00000000 },
24 { _MMIO(0x2724), 0xf0800000 },
25 { _MMIO(0x2720), 0x00000000 },
26 { _MMIO(0x2770), 0x00000004 },
27 { _MMIO(0x2774), 0x00000000 },
28 { _MMIO(0x2778), 0x00000003 },
29 { _MMIO(0x277c), 0x00000000 }
[all...] |
| i915_oa_sklgt2.c | 20 { _MMIO(0x2740), 0x00000000 },
21 { _MMIO(0x2714), 0xf0800000 },
22 { _MMIO(0x2710), 0x00000000 },
23 { _MMIO(0x2724), 0xf0800000 },
24 { _MMIO(0x2720), 0x00000000 },
25 { _MMIO(0x2770), 0x00000004 },
26 { _MMIO(0x2774), 0x00000000 },
27 { _MMIO(0x2778), 0x00000003 },
28 { _MMIO(0x277c), 0x00000000 },
29 { _MMIO(0x2780), 0x00000007 }
[all...] |
| i915_oa_cnl.c | 20 { _MMIO(0x2740), 0x00000000 },
21 { _MMIO(0x2710), 0x00000000 },
22 { _MMIO(0x2714), 0xf0800000 },
23 { _MMIO(0x2720), 0x00000000 },
24 { _MMIO(0x2724), 0xf0800000 },
25 { _MMIO(0x2770), 0x00000004 },
26 { _MMIO(0x2774), 0x0000ffff },
27 { _MMIO(0x2778), 0x00000003 },
28 { _MMIO(0x277c), 0x0000ffff },
29 { _MMIO(0x2780), 0x00000007 }
[all...] |
| i915_oa_icl.c | 20 { _MMIO(0x2740), 0x00000000 },
21 { _MMIO(0x2710), 0x00000000 },
22 { _MMIO(0x2714), 0xf0800000 },
23 { _MMIO(0x2720), 0x00000000 },
24 { _MMIO(0x2724), 0xf0800000 },
25 { _MMIO(0x2770), 0x00000004 },
26 { _MMIO(0x2774), 0x0000ffff },
27 { _MMIO(0x2778), 0x00000003 },
28 { _MMIO(0x277c), 0x0000ffff },
29 { _MMIO(0x2780), 0x00000007 }
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/i915/gt/uc/ |
| intel_guc_reg.h | 18 #define GUC_STATUS _MMIO(0xc000)
41 #define SOFT_SCRATCH(n) _MMIO(0xc180 + (n) * 4)
44 #define GEN11_SOFT_SCRATCH(n) _MMIO(0x190240 + (n) * 4)
47 #define UOS_RSA_SCRATCH(i) _MMIO(0xc200 + (i) * 4)
50 #define DMA_ADDR_0_LOW _MMIO(0xc300)
51 #define DMA_ADDR_0_HIGH _MMIO(0xc304)
52 #define DMA_ADDR_1_LOW _MMIO(0xc308)
53 #define DMA_ADDR_1_HIGH _MMIO(0xc30c)
56 #define DMA_COPY_SIZE _MMIO(0xc310)
57 #define DMA_CTRL _MMIO(0xc314
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/i915/gvt/ |
| reg.h | 74 (((p) == PIPE_A) ? (((q) == PLANE_PRIMARY) ? (_MMIO(0x50080)) : \
75 (_MMIO(0x50090))) : \
76 (((p) == PIPE_B) ? (((q) == PLANE_PRIMARY) ? (_MMIO(0x50088)) : \
77 (_MMIO(0x50098))) : \
78 (((p) == PIPE_C) ? (((q) == PLANE_PRIMARY) ? (_MMIO(0x5008C)) : \
79 (_MMIO(0x5009C))) : \
80 (_MMIO(0x50080))))); })
115 #define PCH_GPIO_BASE _MMIO(0xc5010)
117 #define PCH_GMBUS0 _MMIO(0xc5100)
118 #define PCH_GMBUS1 _MMIO(0xc5104
[all...] |
| handlers.c | 49 #define PCH_PP_STATUS _MMIO(0xc7200)
50 #define PCH_PP_CONTROL _MMIO(0xc7204)
51 #define PCH_PP_ON_DELAYS _MMIO(0xc7208)
52 #define PCH_PP_OFF_DELAYS _MMIO(0xc720c)
53 #define PCH_PP_DIVISOR _MMIO(0xc7210)
470 GEN9_CS_DEBUG_MODE1, //_MMIO(0x20ec)
471 GEN9_CTX_PREEMPT_REG,//_MMIO(0x2248)
472 PS_INVOCATION_COUNT,//_MMIO(0x2348)
473 GEN8_CS_CHICKEN1,//_MMIO(0x2580)
474 _MMIO(0x2690)
[all...] |
| mmio_context.c | 124 {RCS0, _MMIO(0x4dfc), 0, true},
143 {RCS0, _MMIO(0x20D8), 0xffff, true}, /* 0x20d8 */
371 reg = _MMIO(regs[ring_id]);
|
| debugfs.c | 71 preg = intel_uncore_read_notrace(&i915->uncore, _MMIO(offset));
|
| firmware.c | 79 _MMIO(offset));
|
| /src/sys/external/bsd/drm2/dist/drm/i915/ |
| i915_reg.h | 118 * #define BAR _MMIO(0xb000)
119 * #define GEN8_BAR _MMIO(0xb888)
188 #define _MMIO(r) ((const i915_reg_t){ .reg = (r) })
190 #define INVALID_MMIO_REG _MMIO(0)
237 #define _MMIO_PIPE(pipe, a, b) _MMIO(_PIPE(pipe, a, b))
238 #define _MMIO_PLANE(plane, a, b) _MMIO(_PLANE(plane, a, b))
239 #define _MMIO_TRANS(tran, a, b) _MMIO(_TRANS(tran, a, b))
240 #define _MMIO_PORT(port, a, b) _MMIO(_PORT(port, a, b))
241 #define _MMIO_PLL(pll, a, b) _MMIO(_PLL(pll, a, b))
245 #define _MMIO_PIPE3(pipe, a, b, c) _MMIO(_PICK(pipe, a, b, c)
[all...] |
| i915_pvinfo.h | 119 #define vgtif_reg(x) _MMIO(VGT_PVINFO_PAGE + vgtif_offset(x))
|
| /src/sys/external/bsd/drm2/dist/drm/i915/gt/ |
| intel_lrc.h | 40 #define RING_ELSP(base) _MMIO((base) + 0x230)
41 #define RING_EXECLIST_STATUS_LO(base) _MMIO((base) + 0x234)
42 #define RING_EXECLIST_STATUS_HI(base) _MMIO((base) + 0x234 + 4)
43 #define RING_CONTEXT_CONTROL(base) _MMIO((base) + 0x244)
49 #define RING_CONTEXT_STATUS_PTR(base) _MMIO((base) + 0x3a0)
50 #define RING_EXECLIST_SQ_CONTENTS(base) _MMIO((base) + 0x510)
51 #define RING_EXECLIST_CONTROL(base) _MMIO((base) + 0x550)
|
| /src/sys/external/bsd/drm2/dist/drm/i915/selftests/ |
| intel_uncore.c | 197 i915_reg_t mmio = _MMIO(engine->mmio_base + r->offset);
|
