1 /* 2 * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting 3 * Copyright (c) 2002-2008 Atheros Communications, Inc. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 * 17 * $Id: ar2425.c,v 1.4 2013/09/12 12:05:52 martin Exp $ 18 */ 19 #include "opt_ah.h" 20 21 #include "ah.h" 22 #include "ah_internal.h" 23 24 #include "ar5212/ar5212.h" 25 #include "ar5212/ar5212reg.h" 26 #include "ar5212/ar5212phy.h" 27 28 #include "ah_eeprom_v3.h" 29 30 #define AH_5212_2425 31 #define AH_5212_2417 32 #include "ar5212/ar5212.ini" 33 34 #define N(a) (sizeof(a)/sizeof(a[0])) 35 36 struct ar2425State { 37 RF_HAL_FUNCS base; /* public state, must be first */ 38 uint16_t pcdacTable[PWR_TABLE_SIZE_2413]; 39 40 uint32_t Bank1Data[N(ar5212Bank1_2425)]; 41 uint32_t Bank2Data[N(ar5212Bank2_2425)]; 42 uint32_t Bank3Data[N(ar5212Bank3_2425)]; 43 uint32_t Bank6Data[N(ar5212Bank6_2425)]; /* 2417 is same size */ 44 uint32_t Bank7Data[N(ar5212Bank7_2425)]; 45 }; 46 #define AR2425(ah) ((struct ar2425State *) AH5212(ah)->ah_rfHal) 47 48 extern void ar5212ModifyRfBuffer(uint32_t *rfBuf, uint32_t reg32, 49 uint32_t numBits, uint32_t firstBit, uint32_t column); 50 51 static void 52 ar2425WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex, 53 int writes) 54 { 55 HAL_INI_WRITE_ARRAY(ah, ar5212Modes_2425, modesIndex, writes); 56 HAL_INI_WRITE_ARRAY(ah, ar5212Common_2425, 1, writes); 57 HAL_INI_WRITE_ARRAY(ah, ar5212BB_RfGain_2425, freqIndex, writes); 58 #if 0 59 /* 60 * for SWAN similar to Condor 61 * Bit 0 enables link to go to L1 when MAC goes to sleep. 62 * Bit 3 enables the loop back the link down to reset. 63 */ 64 if (AH_PRIVATE(ah)->ah_ispcie && && ath_hal_pcieL1SKPEnable) { 65 OS_REG_WRITE(ah, AR_PCIE_PMC, 66 AR_PCIE_PMC_ENA_L1 | AR_PCIE_PMC_ENA_RESET); 67 } 68 /* 69 * for Standby issue in Swan/Condor. 70 * Bit 9 (MAC_WOW_PWR_STATE_MASK_D2)to be set to avoid skips 71 * before last Training Sequence 2 (TS2) 72 * Bit 8 (MAC_WOW_PWR_STATE_MASK_D1)to be unset to assert 73 * Power Reset along with PCI Reset 74 */ 75 OS_REG_SET_BIT(ah, AR_PCIE_PMC, MAC_WOW_PWR_STATE_MASK_D2); 76 #endif 77 } 78 79 /* 80 * Take the MHz channel value and set the Channel value 81 * 82 * ASSUMES: Writes enabled to analog bus 83 */ 84 static HAL_BOOL 85 ar2425SetChannel(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan) 86 { 87 uint32_t channelSel = 0; 88 uint32_t bModeSynth = 0; 89 uint32_t aModeRefSel = 0; 90 uint32_t reg32 = 0; 91 uint16_t freq; 92 93 OS_MARK(ah, AH_MARK_SETCHANNEL, chan->channel); 94 95 if (chan->channel < 4800) { 96 uint32_t txctl; 97 98 channelSel = chan->channel - 2272; 99 channelSel = ath_hal_reverseBits(channelSel, 8); 100 101 txctl = OS_REG_READ(ah, AR_PHY_CCK_TX_CTRL); 102 if (chan->channel == 2484) { 103 // Enable channel spreading for channel 14 104 OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, 105 txctl | AR_PHY_CCK_TX_CTRL_JAPAN); 106 } else { 107 OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, 108 txctl &~ AR_PHY_CCK_TX_CTRL_JAPAN); 109 } 110 111 } else if (((chan->channel % 5) == 2) && (chan->channel <= 5435)) { 112 freq = chan->channel - 2; /* Align to even 5MHz raster */ 113 channelSel = ath_hal_reverseBits( 114 (uint32_t)(((freq - 4800)*10)/25 + 1), 8); 115 aModeRefSel = ath_hal_reverseBits(0, 2); 116 } else if ((chan->channel % 20) == 0 && chan->channel >= 5120) { 117 channelSel = ath_hal_reverseBits( 118 ((chan->channel - 4800) / 20 << 2), 8); 119 aModeRefSel = ath_hal_reverseBits(1, 2); 120 } else if ((chan->channel % 10) == 0) { 121 channelSel = ath_hal_reverseBits( 122 ((chan->channel - 4800) / 10 << 1), 8); 123 aModeRefSel = ath_hal_reverseBits(1, 2); 124 } else if ((chan->channel % 5) == 0) { 125 channelSel = ath_hal_reverseBits( 126 (chan->channel - 4800) / 5, 8); 127 aModeRefSel = ath_hal_reverseBits(1, 2); 128 } else { 129 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel %u MHz\n", 130 __func__, chan->channel); 131 return AH_FALSE; 132 } 133 134 reg32 = (channelSel << 4) | (aModeRefSel << 2) | (bModeSynth << 1) | 135 (1 << 12) | 0x1; 136 OS_REG_WRITE(ah, AR_PHY(0x27), reg32 & 0xff); 137 138 reg32 >>= 8; 139 OS_REG_WRITE(ah, AR_PHY(0x36), reg32 & 0x7f); 140 141 AH_PRIVATE(ah)->ah_curchan = chan; 142 return AH_TRUE; 143 } 144 145 /* 146 * Reads EEPROM header info from device structure and programs 147 * all rf registers 148 * 149 * REQUIRES: Access to the analog rf device 150 */ 151 static HAL_BOOL 152 ar2425SetRfRegs(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan, uint16_t modesIndex, uint16_t *rfXpdGain) 153 { 154 #define RF_BANK_SETUP(_priv, _ix, _col) do { \ 155 int i; \ 156 for (i = 0; i < N(ar5212Bank##_ix##_2425); i++) \ 157 (_priv)->Bank##_ix##Data[i] = ar5212Bank##_ix##_2425[i][_col];\ 158 } while (0) 159 struct ath_hal_5212 *ahp = AH5212(ah); 160 const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom; 161 struct ar2425State *priv = AR2425(ah); 162 uint16_t ob2GHz = 0, db2GHz = 0; 163 int regWrites = 0; 164 165 HALDEBUG(ah, HAL_DEBUG_RFPARAM, 166 "==>%s:chan 0x%x flag 0x%x modesIndex 0x%x\n", 167 __func__, chan->channel, chan->channelFlags, modesIndex); 168 169 HALASSERT(priv); 170 171 /* Setup rf parameters */ 172 switch (chan->channelFlags & CHANNEL_ALL) { 173 case CHANNEL_B: 174 ob2GHz = ee->ee_obFor24; 175 db2GHz = ee->ee_dbFor24; 176 break; 177 case CHANNEL_G: 178 case CHANNEL_108G: 179 ob2GHz = ee->ee_obFor24g; 180 db2GHz = ee->ee_dbFor24g; 181 break; 182 default: 183 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel flags 0x%x\n", 184 __func__, chan->channelFlags); 185 return AH_FALSE; 186 } 187 188 /* Bank 1 Write */ 189 RF_BANK_SETUP(priv, 1, 1); 190 191 /* Bank 2 Write */ 192 RF_BANK_SETUP(priv, 2, modesIndex); 193 194 /* Bank 3 Write */ 195 RF_BANK_SETUP(priv, 3, modesIndex); 196 197 /* Bank 6 Write */ 198 RF_BANK_SETUP(priv, 6, modesIndex); 199 200 ar5212ModifyRfBuffer(priv->Bank6Data, ob2GHz, 3, 193, 0); 201 ar5212ModifyRfBuffer(priv->Bank6Data, db2GHz, 3, 190, 0); 202 203 /* Bank 7 Setup */ 204 RF_BANK_SETUP(priv, 7, modesIndex); 205 206 /* Write Analog registers */ 207 HAL_INI_WRITE_BANK(ah, ar5212Bank1_2425, priv->Bank1Data, regWrites); 208 HAL_INI_WRITE_BANK(ah, ar5212Bank2_2425, priv->Bank2Data, regWrites); 209 HAL_INI_WRITE_BANK(ah, ar5212Bank3_2425, priv->Bank3Data, regWrites); 210 if (IS_2417(ah)) { 211 HALASSERT(N(ar5212Bank6_2425) == N(ar5212Bank6_2417)); 212 HAL_INI_WRITE_BANK(ah, ar5212Bank6_2417, priv->Bank6Data, 213 regWrites); 214 } else 215 HAL_INI_WRITE_BANK(ah, ar5212Bank6_2425, priv->Bank6Data, 216 regWrites); 217 HAL_INI_WRITE_BANK(ah, ar5212Bank7_2425, priv->Bank7Data, regWrites); 218 219 /* Now that we have reprogrammed rfgain value, clear the flag. */ 220 ahp->ah_rfgainState = HAL_RFGAIN_INACTIVE; 221 222 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "<==%s\n", __func__); 223 return AH_TRUE; 224 #undef RF_BANK_SETUP 225 } 226 227 /* 228 * Return a reference to the requested RF Bank. 229 */ 230 static uint32_t * 231 ar2425GetRfBank(struct ath_hal *ah, int bank) 232 { 233 struct ar2425State *priv = AR2425(ah); 234 235 HALASSERT(priv != AH_NULL); 236 switch (bank) { 237 case 1: return priv->Bank1Data; 238 case 2: return priv->Bank2Data; 239 case 3: return priv->Bank3Data; 240 case 6: return priv->Bank6Data; 241 case 7: return priv->Bank7Data; 242 } 243 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unknown RF Bank %d requested\n", 244 __func__, bank); 245 return AH_NULL; 246 } 247 248 /* 249 * Return indices surrounding the value in sorted integer lists. 250 * 251 * NB: the input list is assumed to be sorted in ascending order 252 */ 253 static void 254 GetLowerUpperIndex(int16_t v, const uint16_t *lp, uint16_t listSize, 255 uint32_t *vlo, uint32_t *vhi) 256 { 257 int16_t target = v; 258 const uint16_t *ep = lp+listSize; 259 const uint16_t *tp; 260 261 /* 262 * Check first and last elements for out-of-bounds conditions. 263 */ 264 if (target < lp[0]) { 265 *vlo = *vhi = 0; 266 return; 267 } 268 if (target >= ep[-1]) { 269 *vlo = *vhi = listSize - 1; 270 return; 271 } 272 273 /* look for value being near or between 2 values in list */ 274 for (tp = lp; tp < ep; tp++) { 275 /* 276 * If value is close to the current value of the list 277 * then target is not between values, it is one of the values 278 */ 279 if (*tp == target) { 280 *vlo = *vhi = tp - (const uint16_t *) lp; 281 return; 282 } 283 /* 284 * Look for value being between current value and next value 285 * if so return these 2 values 286 */ 287 if (target < tp[1]) { 288 *vlo = tp - (const uint16_t *) lp; 289 *vhi = *vlo + 1; 290 return; 291 } 292 } 293 } 294 295 /* 296 * Fill the Vpdlist for indices Pmax-Pmin 297 */ 298 static HAL_BOOL 299 ar2425FillVpdTable(uint32_t pdGainIdx, int16_t Pmin, int16_t Pmax, 300 const int16_t *pwrList, const uint16_t *VpdList, 301 uint16_t numIntercepts, 302 uint16_t retVpdList[][64]) 303 { 304 uint16_t ii, kk; 305 int16_t currPwr = (int16_t)(2*Pmin); 306 /* since Pmin is pwr*2 and pwrList is 4*pwr */ 307 uint32_t idxL = 0, idxR = 0; 308 309 ii = 0; 310 311 if (numIntercepts < 2) 312 return AH_FALSE; 313 314 while (ii <= (uint16_t)(Pmax - Pmin)) { 315 GetLowerUpperIndex(currPwr, (const uint16_t *) pwrList, 316 numIntercepts, &(idxL), &(idxR)); 317 if (idxR < 1) 318 idxR = 1; /* extrapolate below */ 319 if (idxL == (uint32_t)(numIntercepts - 1)) 320 idxL = numIntercepts - 2; /* extrapolate above */ 321 if (pwrList[idxL] == pwrList[idxR]) 322 kk = VpdList[idxL]; 323 else 324 kk = (uint16_t) 325 (((currPwr - pwrList[idxL])*VpdList[idxR]+ 326 (pwrList[idxR] - currPwr)*VpdList[idxL])/ 327 (pwrList[idxR] - pwrList[idxL])); 328 retVpdList[pdGainIdx][ii] = kk; 329 ii++; 330 currPwr += 2; /* half dB steps */ 331 } 332 333 return AH_TRUE; 334 } 335 336 /* 337 * Returns interpolated or the scaled up interpolated value 338 */ 339 static int16_t 340 interpolate_signed(uint16_t target, uint16_t srcLeft, uint16_t srcRight, 341 int16_t targetLeft, int16_t targetRight) 342 { 343 int16_t rv; 344 345 if (srcRight != srcLeft) { 346 rv = ((target - srcLeft)*targetRight + 347 (srcRight - target)*targetLeft) / (srcRight - srcLeft); 348 } else { 349 rv = targetLeft; 350 } 351 return rv; 352 } 353 354 /* 355 * Uses the data points read from EEPROM to reconstruct the pdadc power table 356 * Called by ar2425SetPowerTable() 357 */ 358 static void 359 ar2425getGainBoundariesAndPdadcsForPowers(struct ath_hal *ah, uint16_t channel, 360 const RAW_DATA_STRUCT_2413 *pRawDataset, 361 uint16_t pdGainOverlap_t2, 362 int16_t *pMinCalPower, uint16_t pPdGainBoundaries[], 363 uint16_t pPdGainValues[], uint16_t pPDADCValues[]) 364 { 365 /* Note the items statically allocated below are to reduce stack usage */ 366 uint32_t ii, jj, kk; 367 int32_t ss;/* potentially -ve index for taking care of pdGainOverlap */ 368 uint32_t idxL = 0, idxR = 0; 369 uint32_t numPdGainsUsed = 0; 370 static uint16_t VpdTable_L[MAX_NUM_PDGAINS_PER_CHANNEL][MAX_PWR_RANGE_IN_HALF_DB]; 371 /* filled out Vpd table for all pdGains (chanL) */ 372 static uint16_t VpdTable_R[MAX_NUM_PDGAINS_PER_CHANNEL][MAX_PWR_RANGE_IN_HALF_DB]; 373 /* filled out Vpd table for all pdGains (chanR) */ 374 static uint16_t VpdTable_I[MAX_NUM_PDGAINS_PER_CHANNEL][MAX_PWR_RANGE_IN_HALF_DB]; 375 /* filled out Vpd table for all pdGains (interpolated) */ 376 /* 377 * If desired to support -ve power levels in future, just 378 * change pwr_I_0 to signed 5-bits. 379 */ 380 static int16_t Pmin_t2[MAX_NUM_PDGAINS_PER_CHANNEL]; 381 /* to accomodate -ve power levels later on. */ 382 static int16_t Pmax_t2[MAX_NUM_PDGAINS_PER_CHANNEL]; 383 /* to accomodate -ve power levels later on */ 384 uint16_t numVpd = 0; 385 uint16_t Vpd_step; 386 int16_t tmpVal ; 387 uint32_t sizeCurrVpdTable, maxIndex, tgtIndex; 388 389 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "==>%s:\n", __func__); 390 391 /* Get upper lower index */ 392 GetLowerUpperIndex(channel, pRawDataset->pChannels, 393 pRawDataset->numChannels, &(idxL), &(idxR)); 394 395 for (ii = 0; ii < MAX_NUM_PDGAINS_PER_CHANNEL; ii++) { 396 jj = MAX_NUM_PDGAINS_PER_CHANNEL - ii - 1; 397 /* work backwards 'cause highest pdGain for lowest power */ 398 numVpd = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].numVpd; 399 if (numVpd > 0) { 400 pPdGainValues[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pd_gain; 401 Pmin_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[0]; 402 if (Pmin_t2[numPdGainsUsed] >pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0]) { 403 Pmin_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0]; 404 } 405 Pmin_t2[numPdGainsUsed] = (int16_t) 406 (Pmin_t2[numPdGainsUsed] / 2); 407 Pmax_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[numVpd-1]; 408 if (Pmax_t2[numPdGainsUsed] > pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[numVpd-1]) 409 Pmax_t2[numPdGainsUsed] = 410 pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[numVpd-1]; 411 Pmax_t2[numPdGainsUsed] = (int16_t)(Pmax_t2[numPdGainsUsed] / 2); 412 ar2425FillVpdTable( 413 numPdGainsUsed, Pmin_t2[numPdGainsUsed], Pmax_t2[numPdGainsUsed], 414 &(pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[0]), 415 &(pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].Vpd[0]), numVpd, VpdTable_L 416 ); 417 ar2425FillVpdTable( 418 numPdGainsUsed, Pmin_t2[numPdGainsUsed], Pmax_t2[numPdGainsUsed], 419 &(pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0]), 420 &(pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].Vpd[0]), numVpd, VpdTable_R 421 ); 422 for (kk = 0; kk < (uint16_t)(Pmax_t2[numPdGainsUsed] - Pmin_t2[numPdGainsUsed]); kk++) { 423 VpdTable_I[numPdGainsUsed][kk] = 424 interpolate_signed( 425 channel, pRawDataset->pChannels[idxL], pRawDataset->pChannels[idxR], 426 (int16_t)VpdTable_L[numPdGainsUsed][kk], (int16_t)VpdTable_R[numPdGainsUsed][kk]); 427 } 428 /* fill VpdTable_I for this pdGain */ 429 numPdGainsUsed++; 430 } 431 /* if this pdGain is used */ 432 } 433 434 *pMinCalPower = Pmin_t2[0]; 435 kk = 0; /* index for the final table */ 436 for (ii = 0; ii < numPdGainsUsed; ii++) { 437 if (ii == (numPdGainsUsed - 1)) 438 pPdGainBoundaries[ii] = Pmax_t2[ii] + 439 PD_GAIN_BOUNDARY_STRETCH_IN_HALF_DB; 440 else 441 pPdGainBoundaries[ii] = (uint16_t) 442 ((Pmax_t2[ii] + Pmin_t2[ii+1]) / 2 ); 443 444 /* Find starting index for this pdGain */ 445 if (ii == 0) 446 ss = 0; /* for the first pdGain, start from index 0 */ 447 else 448 ss = (pPdGainBoundaries[ii-1] - Pmin_t2[ii]) - 449 pdGainOverlap_t2; 450 Vpd_step = (uint16_t)(VpdTable_I[ii][1] - VpdTable_I[ii][0]); 451 Vpd_step = (uint16_t)((Vpd_step < 1) ? 1 : Vpd_step); 452 /* 453 *-ve ss indicates need to extrapolate data below for this pdGain 454 */ 455 while (ss < 0) { 456 tmpVal = (int16_t)(VpdTable_I[ii][0] + ss*Vpd_step); 457 pPDADCValues[kk++] = (uint16_t)((tmpVal < 0) ? 0 : tmpVal); 458 ss++; 459 } 460 461 sizeCurrVpdTable = Pmax_t2[ii] - Pmin_t2[ii]; 462 tgtIndex = pPdGainBoundaries[ii] + pdGainOverlap_t2 - Pmin_t2[ii]; 463 maxIndex = (tgtIndex < sizeCurrVpdTable) ? tgtIndex : sizeCurrVpdTable; 464 465 while (ss < (int16_t)maxIndex) 466 pPDADCValues[kk++] = VpdTable_I[ii][ss++]; 467 468 Vpd_step = (uint16_t)(VpdTable_I[ii][sizeCurrVpdTable-1] - 469 VpdTable_I[ii][sizeCurrVpdTable-2]); 470 Vpd_step = (uint16_t)((Vpd_step < 1) ? 1 : Vpd_step); 471 /* 472 * for last gain, pdGainBoundary == Pmax_t2, so will 473 * have to extrapolate 474 */ 475 if (tgtIndex > maxIndex) { /* need to extrapolate above */ 476 while(ss < (int16_t)tgtIndex) { 477 tmpVal = (uint16_t) 478 (VpdTable_I[ii][sizeCurrVpdTable-1] + 479 (ss-maxIndex)*Vpd_step); 480 pPDADCValues[kk++] = (tmpVal > 127) ? 481 127 : tmpVal; 482 ss++; 483 } 484 } /* extrapolated above */ 485 } /* for all pdGainUsed */ 486 487 while (ii < MAX_NUM_PDGAINS_PER_CHANNEL) { 488 pPdGainBoundaries[ii] = pPdGainBoundaries[ii-1]; 489 ii++; 490 } 491 while (kk < 128) { 492 pPDADCValues[kk] = pPDADCValues[kk-1]; 493 kk++; 494 } 495 496 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "<==%s\n", __func__); 497 } 498 499 500 /* Same as 2413 set power table */ 501 static HAL_BOOL 502 ar2425SetPowerTable(struct ath_hal *ah, 503 int16_t *minPower, int16_t *maxPower, HAL_CHANNEL_INTERNAL *chan, 504 uint16_t *rfXpdGain) 505 { 506 struct ath_hal_5212 *ahp = AH5212(ah); 507 const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom; 508 const RAW_DATA_STRUCT_2413 *pRawDataset = AH_NULL; 509 uint16_t pdGainOverlap_t2; 510 int16_t minCalPower2413_t2; 511 uint16_t *pdadcValues = ahp->ah_pcdacTable; 512 uint16_t gainBoundaries[4]; 513 uint32_t i, reg32, regoffset; 514 515 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s:chan 0x%x flag 0x%x\n", 516 __func__, chan->channel,chan->channelFlags); 517 518 if (IS_CHAN_G(chan) || IS_CHAN_108G(chan)) 519 pRawDataset = &ee->ee_rawDataset2413[headerInfo11G]; 520 else if (IS_CHAN_B(chan)) 521 pRawDataset = &ee->ee_rawDataset2413[headerInfo11B]; 522 else { 523 HALDEBUG(ah, HAL_DEBUG_ANY, "%s:illegal mode\n", __func__); 524 return AH_FALSE; 525 } 526 527 pdGainOverlap_t2 = (uint16_t) SM(OS_REG_READ(ah, AR_PHY_TPCRG5), 528 AR_PHY_TPCRG5_PD_GAIN_OVERLAP); 529 530 ar2425getGainBoundariesAndPdadcsForPowers(ah, chan->channel, 531 pRawDataset, pdGainOverlap_t2,&minCalPower2413_t2,gainBoundaries, 532 rfXpdGain, pdadcValues); 533 534 OS_REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_NUM_PD_GAIN, 535 (pRawDataset->pDataPerChannel[0].numPdGains - 1)); 536 537 /* 538 * Note the pdadc table may not start at 0 dBm power, could be 539 * negative or greater than 0. Need to offset the power 540 * values by the amount of minPower for griffin 541 */ 542 if (minCalPower2413_t2 != 0) 543 ahp->ah_txPowerIndexOffset = (int16_t)(0 - minCalPower2413_t2); 544 else 545 ahp->ah_txPowerIndexOffset = 0; 546 547 /* Finally, write the power values into the baseband power table */ 548 regoffset = 0x9800 + (672 <<2); /* beginning of pdadc table in griffin */ 549 for (i = 0; i < 32; i++) { 550 reg32 = ((pdadcValues[4*i + 0] & 0xFF) << 0) | 551 ((pdadcValues[4*i + 1] & 0xFF) << 8) | 552 ((pdadcValues[4*i + 2] & 0xFF) << 16) | 553 ((pdadcValues[4*i + 3] & 0xFF) << 24) ; 554 OS_REG_WRITE(ah, regoffset, reg32); 555 regoffset += 4; 556 } 557 558 OS_REG_WRITE(ah, AR_PHY_TPCRG5, 559 SM(pdGainOverlap_t2, AR_PHY_TPCRG5_PD_GAIN_OVERLAP) | 560 SM(gainBoundaries[0], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_1) | 561 SM(gainBoundaries[1], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_2) | 562 SM(gainBoundaries[2], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_3) | 563 SM(gainBoundaries[3], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_4)); 564 565 return AH_TRUE; 566 } 567 568 static int16_t 569 ar2425GetMinPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2413 *data) 570 { 571 uint32_t ii,jj; 572 uint16_t Pmin=0,numVpd; 573 574 for (ii = 0; ii < MAX_NUM_PDGAINS_PER_CHANNEL; ii++) { 575 jj = MAX_NUM_PDGAINS_PER_CHANNEL - ii - 1; 576 /* work backwards 'cause highest pdGain for lowest power */ 577 numVpd = data->pDataPerPDGain[jj].numVpd; 578 if (numVpd > 0) { 579 Pmin = data->pDataPerPDGain[jj].pwr_t4[0]; 580 return(Pmin); 581 } 582 } 583 return(Pmin); 584 } 585 586 static int16_t 587 ar2425GetMaxPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2413 *data) 588 { 589 uint32_t ii; 590 uint16_t Pmax=0,numVpd; 591 592 for (ii=0; ii< MAX_NUM_PDGAINS_PER_CHANNEL; ii++) { 593 /* work forwards cuase lowest pdGain for highest power */ 594 numVpd = data->pDataPerPDGain[ii].numVpd; 595 if (numVpd > 0) { 596 Pmax = data->pDataPerPDGain[ii].pwr_t4[numVpd-1]; 597 return(Pmax); 598 } 599 } 600 return(Pmax); 601 } 602 603 static 604 HAL_BOOL 605 ar2425GetChannelMaxMinPower(struct ath_hal *ah, HAL_CHANNEL *chan, 606 int16_t *maxPow, int16_t *minPow) 607 { 608 const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom; 609 const RAW_DATA_STRUCT_2413 *pRawDataset = AH_NULL; 610 const RAW_DATA_PER_CHANNEL_2413 *data = AH_NULL; 611 uint16_t numChannels; 612 int totalD,totalF, totalMin,last, i; 613 614 *maxPow = 0; 615 616 if (IS_CHAN_G(chan) || IS_CHAN_108G(chan)) 617 pRawDataset = &ee->ee_rawDataset2413[headerInfo11G]; 618 else if (IS_CHAN_B(chan)) 619 pRawDataset = &ee->ee_rawDataset2413[headerInfo11B]; 620 else 621 return(AH_FALSE); 622 623 numChannels = pRawDataset->numChannels; 624 data = pRawDataset->pDataPerChannel; 625 626 /* Make sure the channel is in the range of the TP values 627 * (freq piers) 628 */ 629 if (numChannels < 1) 630 return(AH_FALSE); 631 632 if ((chan->channel < data[0].channelValue) || 633 (chan->channel > data[numChannels-1].channelValue)) { 634 if (chan->channel < data[0].channelValue) { 635 *maxPow = ar2425GetMaxPower(ah, &data[0]); 636 *minPow = ar2425GetMinPower(ah, &data[0]); 637 return(AH_TRUE); 638 } else { 639 *maxPow = ar2425GetMaxPower(ah, &data[numChannels - 1]); 640 *minPow = ar2425GetMinPower(ah, &data[numChannels - 1]); 641 return(AH_TRUE); 642 } 643 } 644 645 /* Linearly interpolate the power value now */ 646 for (last=0,i=0; (i<numChannels) && (chan->channel > data[i].channelValue); 647 last = i++); 648 totalD = data[i].channelValue - data[last].channelValue; 649 if (totalD > 0) { 650 totalF = ar2425GetMaxPower(ah, &data[i]) - ar2425GetMaxPower(ah, &data[last]); 651 *maxPow = (int8_t) ((totalF*(chan->channel-data[last].channelValue) + 652 ar2425GetMaxPower(ah, &data[last])*totalD)/totalD); 653 totalMin = ar2425GetMinPower(ah, &data[i]) - ar2425GetMinPower(ah, &data[last]); 654 *minPow = (int8_t) ((totalMin*(chan->channel-data[last].channelValue) + 655 ar2425GetMinPower(ah, &data[last])*totalD)/totalD); 656 return(AH_TRUE); 657 } else { 658 if (chan->channel == data[i].channelValue) { 659 *maxPow = ar2425GetMaxPower(ah, &data[i]); 660 *minPow = ar2425GetMinPower(ah, &data[i]); 661 return(AH_TRUE); 662 } else 663 return(AH_FALSE); 664 } 665 } 666 667 /* 668 * Free memory for analog bank scratch buffers 669 */ 670 static void 671 ar2425RfDetach(struct ath_hal *ah) 672 { 673 struct ath_hal_5212 *ahp = AH5212(ah); 674 675 HALASSERT(ahp->ah_rfHal != AH_NULL); 676 ath_hal_free(ahp->ah_rfHal); 677 ahp->ah_rfHal = AH_NULL; 678 } 679 680 /* 681 * Allocate memory for analog bank scratch buffers 682 * Scratch Buffer will be reinitialized every reset so no need to zero now 683 */ 684 static HAL_BOOL 685 ar2425RfAttach(struct ath_hal *ah, HAL_STATUS *status) 686 { 687 struct ath_hal_5212 *ahp = AH5212(ah); 688 struct ar2425State *priv; 689 690 HALASSERT(ah->ah_magic == AR5212_MAGIC); 691 692 HALASSERT(ahp->ah_rfHal == AH_NULL); 693 priv = ath_hal_malloc(sizeof(struct ar2425State)); 694 if (priv == AH_NULL) { 695 HALDEBUG(ah, HAL_DEBUG_ANY, 696 "%s: cannot allocate private state\n", __func__); 697 *status = HAL_ENOMEM; /* XXX */ 698 return AH_FALSE; 699 } 700 priv->base.rfDetach = ar2425RfDetach; 701 priv->base.writeRegs = ar2425WriteRegs; 702 priv->base.getRfBank = ar2425GetRfBank; 703 priv->base.setChannel = ar2425SetChannel; 704 priv->base.setRfRegs = ar2425SetRfRegs; 705 priv->base.setPowerTable = ar2425SetPowerTable; 706 priv->base.getChannelMaxMinPower = ar2425GetChannelMaxMinPower; 707 priv->base.getNfAdjust = ar5212GetNfAdjust; 708 709 ahp->ah_pcdacTable = priv->pcdacTable; 710 ahp->ah_pcdacTableSize = sizeof(priv->pcdacTable); 711 ahp->ah_rfHal = &priv->base; 712 713 return AH_TRUE; 714 } 715 716 static HAL_BOOL 717 ar2425Probe(struct ath_hal *ah) 718 { 719 return IS_2425(ah) || IS_2417(ah); 720 } 721 AH_RF(RF2425, ar2425Probe, ar2425RfAttach); 722
Indexes created Sat Oct 11 19:10:01 GMT 2025