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    Searched refs:cgs_read_register (Results 1 - 18 of 18) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/acp/
amdgpu_acp_hw.c 48 acp_mode = cgs_read_register(cgs_device,
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_acp.c 379 val = cgs_read_register(adev->acp.cgs_device, mmACP_SOFT_RESET);
386 val = cgs_read_register(adev->acp.cgs_device, mmACP_SOFT_RESET);
398 val = cgs_read_register(adev->acp.cgs_device, mmACP_CONTROL);
405 val = cgs_read_register(adev->acp.cgs_device, mmACP_STATUS);
416 val = cgs_read_register(adev->acp.cgs_device, mmACP_SOFT_RESET);
450 val = cgs_read_register(adev->acp.cgs_device, mmACP_SOFT_RESET);
457 val = cgs_read_register(adev->acp.cgs_device, mmACP_SOFT_RESET);
468 val = cgs_read_register(adev->acp.cgs_device, mmACP_CONTROL);
475 val = cgs_read_register(adev->acp.cgs_device, mmACP_STATUS);
  /src/sys/external/bsd/drm2/dist/drm/amd/include/
cgs_common.h 87 * cgs_read_register() - Read an MMIO register
134 cgs_write_register(device, mm##reg, (cgs_read_register(device, mm##reg) & ~CGS_REG_FIELD_MASK(reg, field)) | (val) << CGS_REG_FIELD_SHIFT(reg, field))
168 #define cgs_read_register(dev,offset) \ macro
  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/
amdgpu_iceland_smumgr.c 1313 ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC7) >> 16) & 0xf))
1314 dll_state_on = ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC5) >> 1) & 0x1) ? 1 : 0;
1316 dll_state_on = ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC6) >> 1) & 0x1) ? 1 : 0;
1322 dll_state_on = ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC5) >> 1) & 0x1) ? 1 : 0;
1605 dramTiming = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING);
1606 dramTiming2 = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING2);
2376 return (uint8_t) (0xFF & (cgs_read_register(hwmgr->device, mmBIOS_SCRATCH_4) >> 16));
2528 temp_reg = cgs_read_register(hwmgr->device, mmMC_PMG_CMD_EMRS);
2540 temp_reg = cgs_read_register(hwmgr->device, mmMC_PMG_CMD_MRS);
2569 temp_reg = cgs_read_register(hwmgr->device, mmMC_PMG_CMD_MRS1)
    [all...]
amdgpu_ci_smumgr.c 156 original_data = cgs_read_register(hwmgr->device, mmSMC_IND_DATA_0);
209 *value = cgs_read_register(hwmgr->device, mmSMC_IND_DATA_0);
1265 ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC7) >> 16) & 0xf))
1266 dll_state_on = ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC5) >> 1) & 0x1) ? 1 : 0;
1268 dll_state_on = ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC6) >> 1) & 0x1) ? 1 : 0;
1274 dll_state_on = ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC5) >> 1) & 0x1) ? 1 : 0;
1642 dramTiming = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING);
1643 dramTiming2 = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING2);
2447 return (uint8_t) (0xFF & (cgs_read_register(hwmgr->device, mmBIOS_SCRATCH_4) >> 16));
2599 temp_reg = cgs_read_register(hwmgr->device, mmMC_PMG_CMD_EMRS)
    [all...]
amdgpu_tonga_smumgr.c 1053 ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC7) >> 16) & 0xf)) {
1054 dll_state_on = ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC5) >> 1) & 0x1) ? 1 : 0;
1056 dll_state_on = ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC6) >> 1) & 0x1) ? 1 : 0;
1065 dll_state_on = ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC5) >> 1) & 0x1) ? 1 : 0;
1480 dramTiming = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING);
1481 dramTiming2 = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING2);
2406 (0 == (cgs_read_register(hwmgr->device, mmGPIOPAD_A) &
2837 return (uint8_t) (0xFF & (cgs_read_register(hwmgr->device, mmBIOS_SCRATCH_4) >> 16));
2991 temp_reg = cgs_read_register(hwmgr->device,
3004 temp_reg = cgs_read_register(hwmgr->device, mmMC_PMG_CMD_MRS)
    [all...]
amdgpu_smu8_smumgr.c 68 return cgs_read_register(hwmgr->device,
87 uint32_t val = cgs_read_register(hwmgr->device,
168 (cgs_read_register(hwmgr->device, mmMP0PUB_IND_DATA) & firmware))
198 tmp = cgs_read_register(hwmgr->device,
204 tmp = cgs_read_register(hwmgr->device,
742 hwmgr->smu_version = cgs_read_register(hwmgr->device, mmMP0PUB_IND_DATA);
amdgpu_fiji_smumgr.c 1515 dram_timing = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING);
1516 dram_timing2 = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING2);
1517 burstTime = cgs_read_register(hwmgr->device, mmMC_ARB_BURST_TIME);
2079 table->ThermOutPolarity = (0 == (cgs_read_register(hwmgr->device, mmGPIOPAD_A) &
2527 cgs_read_register(hwmgr->device, mmMC_SEQ_RAS_TIMING));
2529 cgs_read_register(hwmgr->device, mmMC_SEQ_CAS_TIMING));
2531 cgs_read_register(hwmgr->device, mmMC_SEQ_MISC_TIMING2));
2533 cgs_read_register(hwmgr->device, mmMC_SEQ_WR_CTL_D1));
2535 cgs_read_register(hwmgr->device, mmMC_SEQ_RD_CTL_D0));
2537 cgs_read_register(hwmgr->device, mmMC_SEQ_RD_CTL_D1))
    [all...]
amdgpu_smu7_smumgr.c 130 original_data = cgs_read_register(hwmgr->device, mmSMC_IND_DATA_11);
291 *value = result ? 0 : cgs_read_register(hwmgr->device, mmSMC_IND_DATA_11);
amdgpu_vegam_smumgr.c 1264 dram_timing = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING);
1265 dram_timing2 = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING2);
1266 burst_time = cgs_read_register(hwmgr->device, mmMC_ARB_BURST_TIME);
1267 rfsh_rate = cgs_read_register(hwmgr->device, mmMC_ARB_RFSH_RATE);
1268 misc3 = cgs_read_register(hwmgr->device, mmMC_ARB_MISC3);
2088 (0 == (cgs_read_register(hwmgr->device, mmGPIOPAD_A) &
amdgpu_polaris10_smumgr.c 1355 dram_timing = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING);
1356 dram_timing2 = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING2);
1978 table->ThermOutPolarity = (0 == (cgs_read_register(hwmgr->device, mmGPIOPAD_A)
  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/
smu_helper.h 141 PHM_GET_FIELD(cgs_read_register(device, mm##reg), reg, field)
153 cgs_read_register(device, mm##reg), reg, field, fieldval))
amdgpu_smu7_hwmgr.c 151 hwmgr->microcode_version_info.MC = cgs_read_register(hwmgr->device, mmMC_SEQ_IO_DEBUG_DATA);
466 mc_arb_dram_timing = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING);
467 mc_arb_dram_timing2 = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING2);
471 mc_arb_dram_timing = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING_1);
472 mc_arb_dram_timing2 = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING2_1);
494 mc_cg_config = cgs_read_register(hwmgr->device, mmMC_CG_CONFIG);
1172 (cgs_read_register(hwmgr->device, 0x1488) & ~0x1));
3507 tmp = cgs_read_register(hwmgr->device, mmSMC_MSG_ARG_0);
3546 sclk = cgs_read_register(hwmgr->device, mmSMC_MSG_ARG_0);
3552 mclk = cgs_read_register(hwmgr->device, mmSMC_MSG_ARG_0)
    [all...]
amdgpu_smu_helper.c 126 cur_value = cgs_read_register(hwmgr->device, index);
170 cur_value = cgs_read_register(hwmgr->device,
amdgpu_smu7_powertune.c 927 data = cgs_read_register(hwmgr->device, config_regs->offset);
978 value2 = cgs_read_register(hwmgr->device, mmGRBM_GFX_INDEX);
amdgpu_smu8_hwmgr.c 1765 activity_percent = cgs_read_register(hwmgr->device, mmSMU_MP1_SRBM2P_ARG_0);
amdgpu_vega10_powertune.c 845 data = cgs_read_register(hwmgr->device, config_regs->offset);
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/
amdgpu_dc_helper.c 325 value = cgs_read_register(ctx->cgs_device, address);

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