| /src/sys/external/bsd/drm2/dist/drm/amd/include/ |
| cgs_common.h | 115 * cgs_write_ind_register() - Write an indirect register
137 cgs_write_ind_register(device, space, ix##reg, (cgs_read_ind_register(device, space, ix##reg) & ~CGS_REG_FIELD_MASK(reg, field)) | (val) << CGS_REG_FIELD_SHIFT(reg, field))
174 #define cgs_write_ind_register(dev,space,index,value) \ macro
|
| /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/ |
| smu_helper.h | 156 cgs_write_ind_register(device, port, ix##reg, \
161 cgs_write_ind_register(device, port, ix##reg, \
|
| amdgpu_smu7_hwmgr.c | 406 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC,
430 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC,
447 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC,
1068 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC,
1085 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC,
1121 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, 0xc0400d30, 0x5);
1122 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, 0xc0400d3c, 0x5);
1123 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, 0xc0400d80, 0x100005);
1125 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, 0xc0400d30, 0x400005);
1126 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, 0xc0400d3c, 0x400005)
[all...] |
| amdgpu_vega10_powertune.c | 816 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__DIDT, config_regs->offset, data);
822 cgs_write_ind_register(hwmgr->device, CGS_IND_REG_GC_CAC, config_regs->offset, data);
828 cgs_write_ind_register(hwmgr->device, CGS_IND_REG_SE_CAC, config_regs->offset, data);
899 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__DIDT, ixDIDT_SQ_EDC_CTRL, data);
906 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__DIDT, ixDIDT_DB_EDC_CTRL, data);
913 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__DIDT, ixDIDT_TD_EDC_CTRL, data);
920 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__DIDT, ixDIDT_TCP_EDC_CTRL, data);
927 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__DIDT, ixDIDT_DBR_EDC_CTRL, data);
|
| amdgpu_smu7_powertune.c | 937 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, config_regs->offset, data);
941 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__DIDT, config_regs->offset, data);
945 cgs_write_ind_register(hwmgr->device, CGS_IND_REG_GC_CAC, config_regs->offset, data);
|
| amdgpu_smu8_hwmgr.c | 944 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC,
951 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC,
|
| /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/ |
| amdgpu_fiji_smumgr.c | 120 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC,
139 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC,
176 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC,
1777 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC,
1820 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixPWR_CKS_CNTL, value);
1958 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC,
2389 cgs_write_ind_register(hwmgr->device,
2424 cgs_write_ind_register(hwmgr->device,
2588 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset, PP_HOST_TO_SMC_UL(tmp));
2603 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset, PP_HOST_TO_SMC_UL(tmp))
[all...] |
| amdgpu_vegam_smumgr.c | 121 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixSMU_STATUS, 0);
146 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixFIRMWARE_FLAGS, 0);
169 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC,
355 cgs_write_ind_register(hwmgr->device,
390 cgs_write_ind_register(hwmgr->device,
1545 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixPWR_CKS_CNTL, value);
1706 cgs_write_ind_register(hwmgr->device,
1720 cgs_write_ind_register(hwmgr->device,
1958 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC,
|
| amdgpu_polaris10_smumgr.c | 220 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixSMU_STATUS, 0);
245 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixFIRMWARE_FLAGS, 0);
268 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC,
1595 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixPWR_CKS_CNTL, value);
1634 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, smu_data->smu7_data.soft_regs_start +
1859 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC,
2201 cgs_write_ind_register(hwmgr->device,
2236 cgs_write_ind_register(hwmgr->device,
2504 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset, PP_HOST_TO_SMC_UL(tmp));
2519 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset, PP_HOST_TO_SMC_UL(tmp))
[all...] |
| amdgpu_tonga_smumgr.c | 115 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC,
131 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC,
169 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC,
1703 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC,
1745 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC,
2269 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC,
2700 cgs_write_ind_register(hwmgr->device,
2734 cgs_write_ind_register(hwmgr->device,
3187 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset, PP_HOST_TO_SMC_UL(tmp));
3202 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset, PP_HOST_TO_SMC_UL(tmp))
[all...] |
| amdgpu_smu7_smumgr.c | 354 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC,
|
| amdgpu_ci_smumgr.c | 1977 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC,
2799 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset, PP_HOST_TO_SMC_UL(tmp));
2814 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset, PP_HOST_TO_SMC_UL(tmp));
2834 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset, PP_HOST_TO_SMC_UL(tmp));
2849 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset, PP_HOST_TO_SMC_UL(tmp));
|
| amdgpu_iceland_smumgr.c | 218 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC,
1967 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC,
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/ |
| dm_services.h | 105 cgs_write_ind_register(ctx->cgs_device, addr_space, index, value);
|
