| /src/sys/dev/nand/ |
| nand_toshiba.c | 54 nand_read_parameters_toshiba(device_t self, struct nand_chip * const chip)
78 chip->nc_addr_cycles_column = 2;
79 chip->nc_addr_cycles_row = 3;
80 chip->nc_lun_blocks = 2048;
84 chip->nc_page_size = 1024;
87 chip->nc_page_size = 2048;
90 chip->nc_page_size = 4096;
93 chip->nc_page_size = 8192;
99 chip->nc_spare_size =
101 (chip->nc_page_size >> 9)
[all...] |
| nand_samsung.c | 58 nand_read_parameters_samsung(device_t self, struct nand_chip * const chip)
67 if (chip->nc_manf_id != NAND_MFR_SAMSUNG) {
88 chip->nc_addr_cycles_column = 2;
89 chip->nc_addr_cycles_row = 3;
93 chip->nc_page_size = 1024;
96 chip->nc_page_size = 2048;
99 chip->nc_page_size = 4096;
102 chip->nc_page_size = 8192;
110 chip->nc_block_size = 64 * 1024;
113 chip->nc_block_size = 128 * 1024
[all...] |
| nand.c | 132 struct nand_chip *chip = &sc->sc_chip; local
141 aprint_error("NAND chip is write protected!\n");
145 if (nand_scan_media(self, chip)) {
149 nand_flash_if.erasesize = chip->nc_block_size;
150 nand_flash_if.page_size = chip->nc_page_size;
151 nand_flash_if.writesize = chip->nc_page_size;
154 chip->nc_oob_cache = kmem_alloc(chip->nc_spare_size, KM_SLEEP);
155 chip->nc_page_cache = kmem_alloc(chip->nc_page_size, KM_SLEEP)
189 struct nand_chip *chip = &sc->sc_chip; local
228 struct nand_chip *chip = &sc->sc_chip; local
238 struct nand_chip *chip = &sc->sc_chip; local
614 struct nand_chip *chip = &sc->sc_chip; local
638 struct nand_chip *chip = &sc->sc_chip; local
685 struct nand_chip *chip = &sc->sc_chip; local
773 struct nand_chip *chip = &sc->sc_chip; local
841 struct nand_chip *chip = &sc->sc_chip; local
862 struct nand_chip *chip = &sc->sc_chip; local
888 struct nand_chip *chip = &sc->sc_chip; local
915 struct nand_chip *chip = &sc->sc_chip; local
952 struct nand_chip *chip = &sc->sc_chip; local
990 struct nand_chip *chip = &sc->sc_chip; local
1076 struct nand_chip *chip = &sc->sc_chip; local
1202 struct nand_chip *chip = &sc->sc_chip; local
1264 struct nand_chip *chip = &sc->sc_chip; local
1335 struct nand_chip *chip = &sc->sc_chip; local
1399 struct nand_chip *chip = &sc->sc_chip; local
1429 struct nand_chip *chip = &sc->sc_chip; local
1455 struct nand_chip *chip = &sc->sc_chip; local
[all...] |
| nand_micron.c | 92 nand_read_parameters_micron(device_t self, struct nand_chip * const chip)
99 KASSERT(chip->nc_manf_id == NAND_MFR_MICRON);
100 switch (chip->nc_manf_id) {
116 KASSERT(chip->nc_manf_id == mfgrid);
124 return mt29fxgx_parameters(self, chip, devid, params);
132 mt29fxgx_parameters(device_t self, struct nand_chip * const chip,
149 chip->nc_addr_cycles_column = 2; /* XXX */
150 chip->nc_addr_cycles_row = 3; /* XXX */
152 chip->nc_flags |= NC_BUSWIDTH_16;
153 chip->nc_page_size = MT29FxG_PAGESIZE
[all...] |
| nand_bbt.c | 51 struct nand_chip *chip = &sc->sc_chip; local
54 bbt->nbbt_size = chip->nc_size / chip->nc_block_size / 4;
73 struct nand_chip *chip = &sc->sc_chip; local
76 blocks = chip->nc_size / chip->nc_block_size;
88 addr += chip->nc_block_size;
101 struct nand_chip *chip = &sc->sc_chip; local
102 uint8_t *oob = chip->nc_oob_cache;
119 struct nand_chip *chip = &sc->sc_chip local
161 struct nand_chip *chip = &sc->sc_chip; local
204 struct nand_chip *chip = &sc->sc_chip; local
223 struct nand_chip *chip = &sc->sc_chip; local
[all...] |
| /src/sys/arch/arm/gemini/ |
| gemini_com.h | 9 # error unknown gemini chip
|
| /src/sys/arch/mips/sibyte/include/ |
| sb1250_defs.h | 62 * for chip features only present in certain chip revisions.
64 * SIBYTE_HDR_FEATURES may be defined to be the mask value chip/revision
72 * Generate defines only for that revision of chip.
74 * #if SIBYTE_HDR_FEATURE(chip,pass)
77 * that particular chip type are enabled in SIBYTE_HDR_FEATURES.
81 * Note that there is no implied ordering between chip types.
83 * Note also that 'chip' and 'pass' must textually exactly
88 * #if SIBYTE_HDR_FEATURE_UP_TO(chip,pass)
91 * and earlier revisions of the named chip type
[all...] |
| /src/sys/dev/nor/ |
| nor.c | 144 struct nor_chip * const chip = &sc->sc_chip; local
153 if (nor_scan_media(self, chip))
157 sc->sc_flash_if.erasesize = chip->nc_block_size;
158 sc->sc_flash_if.page_size = chip->nc_page_size;
159 sc->sc_flash_if.writesize = chip->nc_page_size;
163 chip->nc_oob_cache = kmem_alloc(chip->nc_spare_size, KM_SLEEP);
165 chip->nc_page_cache = kmem_alloc(chip->nc_page_size, KM_SLEEP);
192 kmem_free(chip->nc_oob_cache, chip->nc_spare_size)
202 struct nor_chip * const chip = &sc->sc_chip; local
237 struct nor_chip * const chip = &sc->sc_chip; local
427 struct nor_chip * const chip = &sc->sc_chip; local
466 struct nor_chip * const chip = &sc->sc_chip; local
522 struct nor_chip * const chip = &sc->sc_chip; local
600 struct nor_chip * const chip = &sc->sc_chip; local
728 struct nor_chip * const chip = &sc->sc_chip; local
792 struct nor_chip * const chip = &sc->sc_chip; local
864 struct nor_chip * const chip = &sc->sc_chip; local
930 struct nor_chip * const chip = &sc->sc_chip; local
966 struct nor_chip * const chip = &sc->sc_chip; local
[all...] |
| cfi_0002.c | 126 * cfi_0002_time_erase_all - maximum usec delay waiting for erase chip
140 * use the maximum delay for chip erase function
151 struct nor_chip * const chip)
161 chip->nc_page_size =
165 chip->nc_spare_size = 0;
166 chip->nc_badmarker_offs = 0;
240 struct nor_chip * const chip = &sc->sc_chip; local
241 KASSERT(chip != NULL);
242 KASSERT(chip->nc_page_mask != 0);
243 KASSERT((offset & ~chip->nc_page_mask) == 0)
284 struct nor_chip * const chip = &sc->sc_chip; local
[all...] |
| /src/sys/arch/hpcmips/tx/ |
| txcom.c | 208 struct txcom_chip *chip; local
222 chip = sc->sc_chip;
223 tc = chip->sc_tc = ua->ua_tc;
224 slot = chip->sc_slot = ua->ua_slot;
227 txcom_dump(chip);
230 txcom_reset(chip);
241 if (ISSET(chip->sc_hwflags, TXCOM_HW_CONSOLE)) {
307 txcom_reset(struct txcom_chip *chip)
313 tc = chip->sc_tc;
314 slot = chip->sc_slot
422 struct txcom_chip *chip = sc->sc_chip; local
469 struct txcom_chip *chip = &txcom_chip; local
588 struct txcom_chip *chip = sc->sc_chip; local
597 struct txcom_chip *chip = sc->sc_chip; local
695 struct txcom_chip *chip = sc->sc_chip; local
744 struct txcom_chip *chip = sc->sc_chip; local
783 struct txcom_chip *chip; local
1024 struct txcom_chip *chip; local
1065 struct txcom_chip *chip; local
1152 struct txcom_chip *chip = sc->sc_chip; local
1168 struct txcom_chip *chip = sc->sc_chip; local
[all...] |
| tx3912video.c | 91 /* TX3912 built-in video chip itself */
133 struct video_chip *chip; local
147 sc->sc_chip = chip = &tx3912video_chip;
151 depth_print[(ffs(chip->vc_fbdepth) - 1) & 0x3],
152 (unsigned)chip->vc_fbpaddr,
153 (unsigned)(chip->vc_fbpaddr + chip->vc_fbsize));
156 tc = chip->vc_v;
209 struct video_chip *chip = sc->sc_chip; local
210 tx_chipset_tag_t tc = chip->vc_v
240 struct video_chip *chip = sc->sc_chip; local
300 struct video_chip *chip = &tx3912video_chip; local
[all...] |
| /src/sys/arch/hpcmips/vr/ |
| vrkiu.c | 102 vrkiu_write(struct vrkiu_chip *chip, int port, unsigned short val)
105 bus_space_write_2(chip->kc_iot, chip->kc_ioh, port, val);
109 vrkiu_read(struct vrkiu_chip *chip, int port)
112 return (bus_space_read_2(chip->kc_iot, chip->kc_ioh, port));
185 vrkiu_init(struct vrkiu_chip *chip, bus_space_tag_t iot,
189 memset(chip, 0, sizeof(struct vrkiu_chip));
190 chip->kc_iot = iot;
191 chip->kc_ioh = ioh
[all...] |
| /src/sys/arch/arm/sunxi/ |
| sunxi_nand.c | 156 sunxi_nand_rb_state(struct sunxi_nand_softc *sc, struct sunxi_nand_chip *chip)
158 if (chip->chip_rb_pin != NULL)
159 return fdtbus_gpio_read(chip->chip_rb_pin);
162 return __SHIFTOUT(status, NDFC_ST_RB_STATE(chip->chip_rb));
223 struct sunxi_nand_chip *chip)
225 if (chip->chip_addr_count == 0)
231 NAND_WRITE(sc, NDFC_ADDR_LOW, chip->chip_addr[0]);
232 NAND_WRITE(sc, NDFC_ADDR_HIGH, chip->chip_addr[1]);
235 __SHIFTIN(chip->chip_addr_count - 1, NDFC_CMD_ADR_NUM));
240 chip->chip_addr[0] = 0
249 struct sunxi_nand_chip * const chip = &sc->sc_chip; local
306 struct sunxi_nand_chip * const chip = &sc->sc_chip; local
367 struct sunxi_nand_chip * const chip = &sc->sc_chip; local
398 struct sunxi_nand_chip * const chip = &sc->sc_chip; local
415 struct sunxi_nand_chip * const chip = &sc->sc_chip; local
429 struct sunxi_nand_chip * const chip = &sc->sc_chip; local
[all...] |
| /src/sys/dev/isa/ |
| cmsreg.h | 34 #define CMS_DATA0 0x00 /* for chip 0, voices 0-5 */
37 #define CMS_DATA1 0x02 /* for chip 1, voices 6-11 */
130 #define CMS_WRITE(sc, chip, reg, val) \
132 (sc)->sc_shadowregs[((chip)<<5) + (reg)] = val; \
134 CMS_ADDR0 + ((chip)<<1), (reg)); \
136 CMS_DATA0 + ((chip)<<1), (val)); \
139 #define CMS_READ(sc, chip, reg) ((sc)->sc_shadowregs[((chip)<<5) + (reg)])
|
| cms.c | 65 /* shadow registers for each chip */
221 int chip = CHAN_TO_CHIP(vidx); local
248 DPRINTF(("chip=%d voice=%d octave=%d count=%d offset=%d shift=%d\n",
249 chip, voice, octave, count, OCTAVE_OFFSET(voice),
253 CMS_WRITE(sc, chip, CMS_IREG_FREQ0 + voice, count);
256 reg = CMS_READ(sc, chip, CMS_IREG_OCTAVE_1_0 + OCTAVE_OFFSET(voice));
259 CMS_WRITE(sc, chip, CMS_IREG_OCTAVE_1_0 + OCTAVE_OFFSET(voice), reg);
264 CMS_WRITE(sc, chip, CMS_IREG_VOL0 + voice, ((vol<<4)|vol));
267 reg = CMS_READ(sc, chip, CMS_IREG_FREQ_CTL);
269 CMS_WRITE(sc, chip, CMS_IREG_FREQ_CTL, reg)
276 int chip = CHAN_TO_CHIP(vidx); local
[all...] |
| /src/sys/dev/ic/ |
| cyvar.h | 33 #define cd_read_reg(sc,chip,reg) bus_space_read_1(sc->sc_memt, \
34 sc->sc_bsh, sc->sc_cd1400_offs[chip] + \
37 #define cd_write_reg(sc,chip,reg,val) bus_space_write_1(sc->sc_memt, \
38 sc->sc_bsh, sc->sc_cd1400_offs[chip] + \
|
| /src/sys/external/bsd/drm2/dist/drm/ast/ |
| ast_main.c | 132 * our caller that it needs to POST the chip
137 DRM_INFO("VGA not enabled on entry, requesting chip POST\n");
152 ast->chip = AST1100;
156 ast->chip = AST2500;
159 ast->chip = AST2400;
162 ast->chip = AST2300;
167 ast->chip = AST1100;
171 ast->chip = AST2200;
175 ast->chip = AST2150;
179 ast->chip = AST2100
[all...] |
| /src/sys/external/bsd/drm/dist/shared-core/ |
| savage_drv.h | 93 /* these chip tags should match the ones in the 2D driver in savage_regs.h. */
110 #define S3_SAVAGE3D_SERIES(chip) ((chip>=S3_SAVAGE3D) && (chip<=S3_SAVAGE_MX))
112 #define S3_SAVAGE4_SERIES(chip) ((chip==S3_SAVAGE4) \
113 || (chip==S3_PROSAVAGE) \
114 || (chip==S3_TWISTER) \
115 || (chip==S3_PROSAVAGEDDR))
117 #define S3_SAVAGE_MOBILE_SERIES(chip) ((chip==S3_SAVAGE_MX) || (chip==S3_SUPERSAVAGE)
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/savage/ |
| savage_drv.h | 101 /* these chip tags should match the ones in the 2D driver in savage_regs.h. */
118 #define S3_SAVAGE3D_SERIES(chip) ((chip>=S3_SAVAGE3D) && (chip<=S3_SAVAGE_MX))
120 #define S3_SAVAGE4_SERIES(chip) ((chip==S3_SAVAGE4) \
121 || (chip==S3_PROSAVAGE) \
122 || (chip==S3_TWISTER) \
123 || (chip==S3_PROSAVAGEDDR))
125 #define S3_SAVAGE_MOBILE_SERIES(chip) ((chip==S3_SAVAGE_MX) || (chip==S3_SUPERSAVAGE)
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/bios/ |
| nouveau_nvkm_subdev_bios_mxm.c | 103 if (bios->version.chip == 0x84 || bios->version.chip == 0x86)
105 if (bios->version.chip == 0x92)
107 if (bios->version.chip == 0x94 || bios->version.chip == 0x96)
109 if (bios->version.chip == 0x98)
|
| /src/sys/arch/mips/alchemy/ |
| au_icu.c | 157 struct au_chipdep * const chip = au_chipdep(); local
158 KASSERT(chip != NULL);
160 ic0_base = chip->icus[0];
161 ic1_base = chip->icus[1];
166 EVCNT_TYPE_INTR, NULL, chip->name, chip->irqnames[i]);
192 struct au_chipdep *chip; local
194 chip = au_chipdep();
195 KASSERT(chip != NULL);
|
| aubus.c | 148 struct au_chipdep *chip; local
154 chip = au_chipdep();
155 KASSERT(chip != NULL);
159 for (ad = chip->devices; ad->name != NULL; ad++) {
|
| /src/sys/external/bsd/drm2/dist/drm/nouveau/include/nvkm/subdev/ |
| bios.h | 21 u8 chip; member in struct:nvkm_bios::__anon5203
|
| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/device/ |
| nouveau_nvkm_engine_device_base.c | 3121 case 0x004: device->chip = &nv4_chipset; break;
3122 case 0x005: device->chip = &nv5_chipset; break;
3123 case 0x010: device->chip = &nv10_chipset; break;
3124 case 0x011: device->chip = &nv11_chipset; break;
3125 case 0x015: device->chip = &nv15_chipset; break;
3126 case 0x017: device->chip = &nv17_chipset; break;
3127 case 0x018: device->chip = &nv18_chipset; break;
3128 case 0x01a: device->chip = &nv1a_chipset; break;
3129 case 0x01f: device->chip = &nv1f_chipset; break;
3130 case 0x020: device->chip = &nv20_chipset; break
[all...] |
| /src/sys/dev/usb/ |
| if_urtwn.c | 389 sc->chip = 0;
392 SET(sc->chip, URTWN_CHIP_88E);
394 SET(sc->chip, URTWN_CHIP_92EU);
444 aprint_error_dev(self, "unsupported test chip\n");
449 if (sc->chip & URTWN_CHIP_92C) {
450 sc->ntxchains = (sc->chip & URTWN_CHIP_92C_1T2R) ? 1 : 2;
452 } else if (sc->chip & URTWN_CHIP_92EU) {
460 if (ISSET(sc->chip, URTWN_CHIP_88E) ||
461 ISSET(sc->chip, URTWN_CHIP_92EU))
467 (sc->chip & URTWN_CHIP_92EU) ? "8192EU"
[all...] |
