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    Searched refs:clear_state_gpu_addr (Results 1 - 11 of 11) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_rlc.h 142 uint64_t clear_state_gpu_addr; member in struct:amdgpu_rlc
amdgpu_rlc.c 140 &adev->gfx.rlc.clear_state_gpu_addr,
272 &adev->gfx.rlc.clear_state_gpu_addr,
amdgpu_gfx_v6_0.c 2412 &adev->gfx.rlc.clear_state_gpu_addr,
2422 reg_list_mc_addr = adev->gfx.rlc.clear_state_gpu_addr + 256;
2834 WREG32(mmRLC_CLEAR_STATE_RESTORE_BASE, adev->gfx.rlc.clear_state_gpu_addr >> 8);
2941 WREG32(mmRLC_CLEAR_STATE_RESTORE_BASE, adev->gfx.rlc.clear_state_gpu_addr >> 8);
2949 WREG32(mmRLC_CLEAR_STATE_RESTORE_BASE, adev->gfx.rlc.clear_state_gpu_addr >> 8);
amdgpu_gfx_v10_0.c 1001 &adev->gfx.rlc.clear_state_gpu_addr,
1794 adev->gfx.rlc.clear_state_gpu_addr >> 32);
1796 adev->gfx.rlc.clear_state_gpu_addr & 0xfffffffc);
amdgpu_gfx_v7_0.c 3895 WREG32(mmRLC_GPM_SCRATCH_DATA, upper_32_bits(adev->gfx.rlc.clear_state_gpu_addr));
3896 WREG32(mmRLC_GPM_SCRATCH_DATA, lower_32_bits(adev->gfx.rlc.clear_state_gpu_addr));
4545 &adev->gfx.rlc.clear_state_gpu_addr,
amdgpu_gfx_v8_0.c 2086 &adev->gfx.rlc.clear_state_gpu_addr,
3897 adev->gfx.rlc.clear_state_gpu_addr >> 32);
3899 adev->gfx.rlc.clear_state_gpu_addr & 0xfffffffc);
amdgpu_gfx_v9_0.c 2578 adev->gfx.rlc.clear_state_gpu_addr >> 32);
2580 adev->gfx.rlc.clear_state_gpu_addr & 0xfffffffc);
  /src/sys/external/bsd/drm2/dist/drm/radeon/
radeon_evergreen.c 4272 &rdev->rlc.clear_state_gpu_addr);
4291 reg_list_mc_addr = rdev->rlc.clear_state_gpu_addr + 256;
4298 reg_list_mc_addr = rdev->rlc.clear_state_gpu_addr + (reg_list_blk_index * 4);
4418 WREG32(TN_RLC_CLEAR_STATE_RESTORE_BASE, rdev->rlc.clear_state_gpu_addr >> 8);
radeon_si.c 5296 WREG32(RLC_CLEAR_STATE_RESTORE_BASE, rdev->rlc.clear_state_gpu_addr >> 8);
5793 WREG32(RLC_CLEAR_STATE_RESTORE_BASE, rdev->rlc.clear_state_gpu_addr >> 8);
5799 WREG32(RLC_CLEAR_STATE_RESTORE_BASE, rdev->rlc.clear_state_gpu_addr >> 8);
radeon.h 1041 uint64_t clear_state_gpu_addr; member in struct:radeon_rlc
radeon_cik.c 6646 WREG32(RLC_GPM_SCRATCH_DATA, upper_32_bits(rdev->rlc.clear_state_gpu_addr));
6647 WREG32(RLC_GPM_SCRATCH_DATA, lower_32_bits(rdev->rlc.clear_state_gpu_addr));

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