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  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/
processpptables.h 39 const void *clock_info);
amdgpu_hardwaremanager.c 416 int phm_get_current_shallow_sleep_clocks(struct pp_hwmgr *hwmgr, const struct pp_hw_power_state *state, struct pp_clock_info *clock_info)
423 return hwmgr->hwmgr_func->get_current_shallow_sleep_clocks(hwmgr, state, clock_info);
amdgpu_smu10_hwmgr.c 758 const void *clock_info)
964 const struct pp_hw_power_state *state, struct pp_clock_info *clock_info)
968 clock_info->min_eng_clk = ps->levels[0].engine_clock / (1 << (ps->levels[0].ss_divider_index));
969 clock_info->max_eng_clk = ps->levels[ps->level - 1].engine_clock / (1 << (ps->levels[ps->level - 1].ss_divider_index));
amdgpu_smu8_hwmgr.c 1344 const void *clock_info)
1348 const ATOM_PPLIB_CZ_CLOCK_INFO *smu8_clock_info = clock_info;
1598 const struct pp_hw_power_state *state, struct pp_clock_info *clock_info)
1602 clock_info->min_eng_clk = ps->levels[0].engineClock / (1 << (ps->levels[0].ssDividerIndex));
1603 clock_info->max_eng_clk = ps->levels[ps->level - 1].engineClock / (1 << (ps->levels[ps->level - 1].ssDividerIndex));
amdgpu_processpptables.c 1567 void **clock_info,
1592 *clock_info = (void *)((unsigned long)(clock_arrays->clockInfo) + (clockInfoIndex * clock_arrays->ucEntrySize));
  /src/sys/external/bsd/drm2/dist/drm/radeon/
radeon_atombios.c 2081 &rdev->pm.power_state[state_index].clock_info[0];
2083 rdev->pm.power_state[state_index].clock_info[0].flags |=
2134 rdev->pm.power_state[state_index].clock_info =
2137 if (!rdev->pm.power_state[state_index].clock_info)
2140 rdev->pm.power_state[state_index].clock_info[0].voltage.type = VOLTAGE_NONE;
2143 rdev->pm.power_state[state_index].clock_info[0].mclk =
2145 rdev->pm.power_state[state_index].clock_info[0].sclk =
2148 if ((rdev->pm.power_state[state_index].clock_info[0].mclk == 0) ||
2149 (rdev->pm.power_state[state_index].clock_info[0].sclk == 0))
2156 rdev->pm.power_state[state_index].clock_info[0].voltage.type
2576 union pplib_clock_info *clock_info; local in function:radeon_atombios_parse_power_table_4_5
2666 union pplib_clock_info *clock_info; local in function:radeon_atombios_parse_power_table_6
    [all...]
radeon_rs780_dpm.c 755 union pplib_clock_info *clock_info)
760 sclk = le16_to_cpu(clock_info->rs780.usLowEngineClockLow);
761 sclk |= clock_info->rs780.ucLowEngineClockHigh << 16;
763 sclk = le16_to_cpu(clock_info->rs780.usHighEngineClockLow);
764 sclk |= clock_info->rs780.ucHighEngineClockHigh << 16;
766 switch (le16_to_cpu(clock_info->rs780.usVDDC)) {
785 ps->flags = le32_to_cpu(clock_info->rs780.ulFlags);
801 union pplib_clock_info *clock_info; local in function:rs780_parse_power_table
830 clock_info = (union pplib_clock_info *)
846 clock_info);
    [all...]
radeon_combios.c 2658 rdev->pm.power_state[0].clock_info =
2661 rdev->pm.power_state[1].clock_info =
2664 if (!rdev->pm.power_state[0].clock_info ||
2665 !rdev->pm.power_state[1].clock_info)
2742 rdev->pm.power_state[state_index].clock_info[0].mclk = RBIOS32(offset + 0x5 + 0x2);
2743 rdev->pm.power_state[state_index].clock_info[0].sclk = RBIOS32(offset + 0x5 + 0x6);
2744 if ((rdev->pm.power_state[state_index].clock_info[0].mclk == 0) ||
2745 (rdev->pm.power_state[state_index].clock_info[0].sclk == 0))
2755 rdev->pm.power_state[state_index].clock_info[0].voltage.type = VOLTAGE_GPIO;
2757 rdev->pm.power_state[state_index].clock_info[0].voltage.active_high
    [all...]
radeon_rv770_dpm.c 2180 union pplib_clock_info *clock_info)
2202 sclk = le16_to_cpu(clock_info->evergreen.usEngineClockLow);
2203 sclk |= clock_info->evergreen.ucEngineClockHigh << 16;
2204 mclk = le16_to_cpu(clock_info->evergreen.usMemoryClockLow);
2205 mclk |= clock_info->evergreen.ucMemoryClockHigh << 16;
2207 pl->vddc = le16_to_cpu(clock_info->evergreen.usVDDC);
2208 pl->vddci = le16_to_cpu(clock_info->evergreen.usVDDCI);
2209 pl->flags = le32_to_cpu(clock_info->evergreen.ulFlags);
2211 sclk = le16_to_cpu(clock_info->r600.usEngineClockLow);
2212 sclk |= clock_info->r600.ucEngineClockHigh << 16
2277 union pplib_clock_info *clock_info; local in function:rv7xx_parse_power_table
    [all...]
radeon_pm.c 200 clock_info[rdev->pm.requested_clock_mode_index].sclk;
214 clock_info[rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_cm_idx].mclk;
217 clock_info[rdev->pm.requested_clock_mode_index].mclk;
342 struct radeon_pm_clock_info *clock_info; local in function:radeon_pm_print_states
357 clock_info = &(power_state->clock_info[j]);
361 clock_info->sclk * 10);
365 clock_info->sclk * 10,
366 clock_info->mclk * 10,
367 clock_info->voltage.voltage)
    [all...]
radeon_trinity_dpm.c 1714 union pplib_clock_info *clock_info)
1721 sclk = le16_to_cpu(clock_info->sumo.usEngineClockLow);
1722 sclk |= clock_info->sumo.ucEngineClockHigh << 16;
1724 pl->vddc_index = clock_info->sumo.vddcIndex;
1740 union pplib_clock_info *clock_info; local in function:trinity_parse_power_table
1778 if (!rdev->pm.power_state[i].clock_info)
1794 clock_info = (union pplib_clock_info *)
1799 clock_info);
1813 clock_info = (union pplib_clock_info *)
1815 sclk = le16_to_cpu(clock_info->sumo.usEngineClockLow)
    [all...]
radeon_rv6xx_dpm.c 1823 union pplib_clock_info *clock_info)
1843 sclk = le16_to_cpu(clock_info->r600.usEngineClockLow);
1844 sclk |= clock_info->r600.ucEngineClockHigh << 16;
1845 mclk = le16_to_cpu(clock_info->r600.usMemoryClockLow);
1846 mclk |= clock_info->r600.ucMemoryClockHigh << 16;
1850 pl->vddc = le16_to_cpu(clock_info->r600.usVDDC);
1851 pl->flags = le32_to_cpu(clock_info->r600.ulFlags);
1883 union pplib_clock_info *clock_info; local in function:rv6xx_parse_power_table
1923 clock_info = (union pplib_clock_info *)
1929 clock_info);
    [all...]
radeon_sumo_dpm.c 1436 union pplib_clock_info *clock_info)
1443 sclk = le16_to_cpu(clock_info->sumo.usEngineClockLow);
1444 sclk |= clock_info->sumo.ucEngineClockHigh << 16;
1446 pl->vddc_index = clock_info->sumo.vddcIndex;
1447 pl->sclk_dpm_tdp_limit = clock_info->sumo.tdpLimit;
1463 union pplib_clock_info *clock_info; local in function:sumo_parse_power_table
1501 if (!rdev->pm.power_state[i].clock_info)
1516 clock_info = (union pplib_clock_info *)
1521 clock_info);
radeon_kv_dpm.c 2619 union pplib_clock_info *clock_info)
2626 sclk = le16_to_cpu(clock_info->sumo.usEngineClockLow);
2627 sclk |= clock_info->sumo.ucEngineClockHigh << 16;
2629 pl->vddc_index = clock_info->sumo.vddcIndex;
2645 union pplib_clock_info *clock_info; local in function:kv_parse_power_table
2683 if (!rdev->pm.power_state[i].clock_info)
2699 clock_info = (union pplib_clock_info *)
2704 clock_info);
2718 clock_info = (union pplib_clock_info *)
2720 sclk = le16_to_cpu(clock_info->sumo.usEngineClockLow)
    [all...]
radeon_ci_dpm.c 5482 union pplib_clock_info *clock_info)
5490 pl->sclk = le16_to_cpu(clock_info->ci.usEngineClockLow);
5491 pl->sclk |= clock_info->ci.ucEngineClockHigh << 16;
5492 pl->mclk = le16_to_cpu(clock_info->ci.usMemoryClockLow);
5493 pl->mclk |= clock_info->ci.ucMemoryClockHigh << 16;
5498 clock_info->ci.ucPCIEGen);
5501 le16_to_cpu(clock_info->ci.usPCIELane));
5555 union pplib_clock_info *clock_info; local in function:ci_parse_power_table
5593 if (!rdev->pm.power_state[i].clock_info)
5612 clock_info = (union pplib_clock_info *
    [all...]
radeon_ni_dpm.c 3926 union pplib_clock_info *clock_info)
3935 pl->sclk = le16_to_cpu(clock_info->evergreen.usEngineClockLow);
3936 pl->sclk |= clock_info->evergreen.ucEngineClockHigh << 16;
3937 pl->mclk = le16_to_cpu(clock_info->evergreen.usMemoryClockLow);
3938 pl->mclk |= clock_info->evergreen.ucMemoryClockHigh << 16;
3940 pl->vddc = le16_to_cpu(clock_info->evergreen.usVDDC);
3941 pl->vddci = le16_to_cpu(clock_info->evergreen.usVDDCI);
3942 pl->flags = le32_to_cpu(clock_info->evergreen.ulFlags);
3995 union pplib_clock_info *clock_info; local in function:ni_parse_power_table
4036 clock_info = (union pplib_clock_info *
    [all...]
radeon_si_dpm.c 6737 union pplib_clock_info *clock_info)
6749 pl->sclk = le16_to_cpu(clock_info->si.usEngineClockLow);
6750 pl->sclk |= clock_info->si.ucEngineClockHigh << 16;
6751 pl->mclk = le16_to_cpu(clock_info->si.usMemoryClockLow);
6752 pl->mclk |= clock_info->si.ucMemoryClockHigh << 16;
6754 pl->vddc = le16_to_cpu(clock_info->si.usVDDC);
6755 pl->vddci = le16_to_cpu(clock_info->si.usVDDCI);
6756 pl->flags = le32_to_cpu(clock_info->si.ulFlags);
6760 clock_info->si.ucPCIEGen);
6817 union pplib_clock_info *clock_info; local in function:si_parse_power_table
    [all...]
radeon_r100.c 252 (rdev->pm.power_state[rdev->pm.requested_power_state_index].clock_info[0].flags &
293 clock_info[rdev->pm.requested_clock_mode_index].sclk,
295 clock_info[rdev->pm.requested_clock_mode_index].mclk,
360 struct radeon_voltage *voltage = &ps->clock_info[0].voltage;
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/
amdgpu_dce_audio.c 790 struct azalia_clock_info clock_info = { 0 }; local in function:dce_aud_wall_dto_setup
804 &clock_info);
811 clock_info.audio_dto_module,\
812 clock_info.audio_dto_phase);
829 DCCG_AUDIO_DTO0_MODULE, clock_info.audio_dto_module);
833 DCCG_AUDIO_DTO0_PHASE, clock_info.audio_dto_phase);
845 &clock_info);
861 DCCG_AUDIO_DTO1_MODULE, clock_info.audio_dto_module);
865 DCCG_AUDIO_DTO1_PHASE, clock_info.audio_dto_phase);
amdgpu_dce_stream_encoder.c 1282 const struct audio_clock_info *clock_info; local in function:get_audio_clock_info
1289 clock_info = audio_clock_info_table_48bpc;
1294 clock_info = audio_clock_info_table_36bpc;
1299 clock_info = audio_clock_info_table;
1305 if (clock_info != NULL) {
1308 if (clock_info[index].pixel_clock_in_10khz >
1311 else if (clock_info[index].pixel_clock_in_10khz ==
1314 *audio_clock_info = clock_info[index];
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/
amdgpu_dcn10_stream_encoder.c 1220 const struct audio_clock_info *clock_info; local in function:get_audio_clock_info
1227 clock_info = audio_clock_info_table_48bpc;
1232 clock_info = audio_clock_info_table_36bpc;
1237 clock_info = audio_clock_info_table;
1243 if (clock_info != NULL) {
1246 if (clock_info[index].pixel_clock_in_10khz >
1249 else if (clock_info[index].pixel_clock_in_10khz ==
1252 *audio_clock_info = clock_info[index];
  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/inc/
hardwaremanager.h 450 extern int phm_get_current_shallow_sleep_clocks(struct pp_hwmgr *hwmgr, const struct pp_hw_power_state *state, struct pp_clock_info *clock_info);
hwmgr.h 303 const struct pp_hw_power_state *state, struct pp_clock_info *clock_info);
374 void **clock_info,
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_kv_dpm.c 2687 union pplib_clock_info *clock_info)
2694 sclk = le16_to_cpu(clock_info->sumo.usEngineClockLow);
2695 sclk |= clock_info->sumo.ucEngineClockHigh << 16;
2697 pl->vddc_index = clock_info->sumo.vddcIndex;
2713 union pplib_clock_info *clock_info; local in function:kv_parse_power_table
2767 clock_info = (union pplib_clock_info *)
2772 clock_info);
2786 clock_info = (union pplib_clock_info *)
2788 sclk = le16_to_cpu(clock_info->sumo.usEngineClockLow);
2789 sclk |= clock_info->sumo.ucEngineClockHigh << 16
    [all...]
amdgpu_si_dpm.c 7139 union pplib_clock_info *clock_info)
7151 pl->sclk = le16_to_cpu(clock_info->si.usEngineClockLow);
7152 pl->sclk |= clock_info->si.ucEngineClockHigh << 16;
7153 pl->mclk = le16_to_cpu(clock_info->si.usMemoryClockLow);
7154 pl->mclk |= clock_info->si.ucMemoryClockHigh << 16;
7156 pl->vddc = le16_to_cpu(clock_info->si.usVDDC);
7157 pl->vddci = le16_to_cpu(clock_info->si.usVDDCI);
7158 pl->flags = le32_to_cpu(clock_info->si.ulFlags);
7162 clock_info->si.ucPCIEGen);
7224 union pplib_clock_info *clock_info; local in function:si_parse_power_table
    [all...]

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