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    Searched refs:crtc_hsync_start (Results 1 - 24 of 24) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_encoders.c 201 adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hdisplay + hover;
202 adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + hsync_width;
amdgpu_atombios_crtc.c 214 cpu_to_le16(mode->crtc_hsync_start - mode->crtc_hdisplay + amdgpu_crtc->h_border);
216 cpu_to_le16(mode->crtc_hsync_end - mode->crtc_hsync_start);
  /src/sys/arch/arm/sunxi/
sunxi_lcdc.c 221 const u_int hspw = mode->crtc_hsync_end - mode->crtc_hsync_start;
222 const u_int hbp = mode->crtc_htotal - mode->crtc_hsync_start;
274 const u_int hspw = mode->crtc_hsync_end - mode->crtc_hsync_start;
275 const u_int hbp = mode->crtc_htotal - mode->crtc_hsync_start;
  /src/sys/external/bsd/drm2/dist/drm/radeon/
radeon_legacy_crtc.c 92 hsync_wid = (mode->crtc_hsync_end - mode->crtc_hsync_start) / 8;
95 hsync_start = mode->crtc_hsync_start - 8;
175 hsync_wid = (mode->crtc_hsync_end - mode->crtc_hsync_start) / 8;
179 fp_h_sync_strt_wid = ((((mode->crtc_hsync_start - mode->crtc_hblank_start) / 8) & 0x1fff)
641 hsync_wid = (mode->crtc_hsync_end - mode->crtc_hsync_start) / 8;
644 hsync_start = mode->crtc_hsync_start - 8;
radeon_encoders.c 366 adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hdisplay + hover;
367 adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + hsync_width;
radeon_atombios_crtc.c 326 cpu_to_le16(mode->crtc_hsync_start - mode->crtc_hdisplay + radeon_crtc->h_border);
328 cpu_to_le16(mode->crtc_hsync_end - mode->crtc_hsync_start);
368 args.usH_SyncStart = cpu_to_le16(mode->crtc_hsync_start);
370 cpu_to_le16(mode->crtc_hsync_end - mode->crtc_hsync_start);
radeon_atombios.c 1819 mode->crtc_hsync_start = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_H_SyncStart);
1860 mode->crtc_hsync_start = le16_to_cpu(dtd_timings->usHActive) +
1862 mode->crtc_hsync_end = mode->crtc_hsync_start +
  /src/sys/external/bsd/drm2/dist/drm/i915/display/
vlv_dsi.c 1111 adjusted_mode->crtc_hsync_start = hfp + adjusted_mode->crtc_hdisplay;
1112 adjusted_mode->crtc_hsync_end = hsync + adjusted_mode->crtc_hsync_start;
1133 hfp_sw = adjusted_mode_sw->crtc_hsync_start -
1136 adjusted_mode_sw->crtc_hsync_start;
1177 if (adjusted_mode->crtc_hsync_start == crtc_hsync_start_sw)
1178 adjusted_mode->crtc_hsync_start =
1179 adjusted_mode_sw->crtc_hsync_start;
1243 hfp = adjusted_mode->crtc_hsync_start - adjusted_mode->crtc_hdisplay;
1244 hsync = adjusted_mode->crtc_hsync_end - adjusted_mode->crtc_hsync_start;
icl_dsi.c 824 hsync_start = DIV_ROUND_UP(adjusted_mode->crtc_hsync_start * mul, div);
1290 adjusted_mode->crtc_hsync_start =
1291 DIV_ROUND_UP(adjusted_mode->crtc_hsync_start * mul, div);
1308 adjusted_mode->crtc_hsync_start *= 2;
dvo_ns2501.c 585 adjusted_mode->crtc_hsync_start,
intel_panel.c 256 sync_width = adjusted_mode->crtc_hsync_end - adjusted_mode->crtc_hsync_start;
267 adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hblank_start + sync_pos;
268 adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + sync_width;
intel_display.c 7939 adjusted_mode->crtc_hsync_start == adjusted_mode->crtc_hdisplay)
8621 vsyncshift = adjusted_mode->crtc_hsync_start -
8637 (adjusted_mode->crtc_hsync_start - 1) |
8709 pipe_config->hw.adjusted_mode.crtc_hsync_start = (tmp & 0xffff) + 1;
8754 mode->hsync_start = pipe_config->hw.adjusted_mode.crtc_hsync_start;
12707 mode->crtc_hdisplay, mode->crtc_hsync_start,
13586 PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hsync_start);
intel_hdmi.c 963 mode->crtc_hsync_start % pixels_per_group == 0 &&
  /src/sys/external/bsd/drm2/dist/include/drm/
drm_modes.h 190 * @crtc_hsync_start: hardware mode horizontal sync start
365 int crtc_hsync_start; member in struct:drm_display_mode
  /src/sys/external/bsd/drm2/dist/drm/nouveau/dispnv50/
nouveau_dispnv50_head.c 275 m->h.synce = mode->crtc_hsync_end - mode->crtc_hsync_start - 1;
276 m->h.blanke = mode->crtc_hblank_end - mode->crtc_hsync_start - 1;
  /src/sys/arch/arm/ti/
ti_lcdc.c 163 const u_int hspw = adjusted_mode->crtc_hsync_end - adjusted_mode->crtc_hsync_start;
165 const u_int hfp = adjusted_mode->crtc_hsync_start - adjusted_mode->crtc_hdisplay;
  /src/sys/dev/ic/
dw_hdmi.c 418 const uint16_t hsyncindelay = mode->crtc_hsync_start - mode->crtc_hdisplay;
419 const uint16_t hsyncinwidth = mode->crtc_hsync_end - mode->crtc_hsync_start;
  /src/sys/arch/arm/nvidia/
tegra_drm_mode.c 575 const u_int hspw = mode->crtc_hsync_end - mode->crtc_hsync_start;
577 const u_int hfp = mode->crtc_hsync_start - mode->crtc_hdisplay;
  /src/sys/external/bsd/drm2/dist/drm/
drm_modes.c 861 p->crtc_hsync_start = p->hsync_start;
913 p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay);
  /src/sys/external/bsd/drm2/dist/drm/ast/
ast_mode.c 199 adjusted_mode->crtc_hsync_start = vbios_mode->enh_table->hde + hborder +
354 temp = ((mode->crtc_hsync_start-precache) >> 3) - 1;
  /src/sys/dev/i2c/
tda19988.c 411 hs_pix_start = mode->crtc_hsync_start - mode->crtc_hdisplay;
  /src/sys/external/bsd/drm2/dist/drm/amd/display/amdgpu_dm/
amdgpu_dm.c 3825 mode_in->crtc_hsync_end - mode_in->crtc_hsync_start;
3827 mode_in->crtc_hsync_start - mode_in->crtc_hdisplay;
3905 dst_mode->crtc_hsync_start = src_mode->crtc_hsync_start;
  /src/sys/external/bsd/drm2/dist/drm/nouveau/dispnv04/
nouveau_dispnv04_crtc.c 246 int horizStart = (mode->crtc_hsync_start >> 3) + 1;
  /src/sys/external/bsd/drm2/dist/drm/i915/
i915_irq.c 610 hsync_start = mode->crtc_hsync_start;
792 hsync_start = mode->crtc_hsync_start;

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